From: Max Chou <max.chou@sifive.com>
To: Chao Liu <chao.liu.zevorn@gmail.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,
Weiwei Li <liwei1518@gmail.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH v4 12/14] target/riscv: rvv: Add vfext.vf2 instruction for Zvfofp4min extension
Date: Thu, 16 Apr 2026 18:28:04 +0800 [thread overview]
Message-ID: <aeCymertMAq3AZd8@sifive.com> (raw)
In-Reply-To: <aahK0egnN_1lEWnH@ZEVORN-PC.localdomain>
On 2026-03-04 23:13, Chao Liu wrote:
> > +static bool trans_vfext_vf2(DisasContext *s, arg_rmr *a)
> > +{
> > + if (vext_zvfofp4min_check(s, a)) {
> Missing REQUIRE_FPU here.
>
> All other FP vector instruction translation functions
> in this series (trans_vfncvtbf16_sat_f_f_w, trans_vfncvt_f_f_q,
> trans_vfncvt_sat_f_f_q, trans_vfwcvtbf16_f_f_v,
> trans_vfncvtbf16_f_f_w) have REQUIRE_FPU at the top.
>
> Without it, this instruction could execute even when FPU
> is disabled.
According to the Zvfofp4min specification,
"The vfext.vf2 instruction does not access the fcsr and is not considered
a floating-point instruction for the purposes of the floating-point
context status (FS) settings."
As a result, the vfext.vf2 instruction will not raise an illegal
instruction exception when the mstatus.fs flag is disabled.
rnax
next prev parent reply other threads:[~2026-04-16 10:29 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-04 13:39 [PATCH v4 00/14] Add OCP FP8/FP4 and RISC-V Zvfofp8min/Zvfofp4min extension support Max Chou
2026-03-04 13:39 ` [PATCH v4 01/14] target/riscv: rvv: Fix NOP_UU_B vs2 width Max Chou
2026-03-05 2:32 ` Alistair Francis
2026-03-04 13:39 ` [PATCH v4 02/14] target/riscv: Add cfg properity for Zvfofp8min extension Max Chou
2026-03-04 15:01 ` Chao Liu
2026-03-05 2:39 ` Alistair Francis
2026-03-04 13:39 ` [PATCH v4 03/14] target/riscv: Add implied rules " Max Chou
2026-03-05 2:40 ` Alistair Francis
2026-03-04 13:39 ` [PATCH v4 04/14] target/riscv: rvv: Make vfwcvtbf16.f.f.v support OFP8 to BF16 conversion " Max Chou
2026-03-04 15:02 ` Chao Liu
2026-03-04 13:39 ` [PATCH v4 05/14] target/riscv: rvv: Make vfncvtbf16.f.f.w support BF16 to OFP8 " Max Chou
2026-03-04 15:03 ` Chao Liu
2026-03-04 13:39 ` [PATCH v4 06/14] target/riscv: rvv: Add vfncvtbf16.sat.f.f.w instruction " Max Chou
2026-03-04 13:39 ` [PATCH v4 07/14] target/riscv: rvv: Add vfncvt.f.f.q and vfncvt.sat.f.f.q instructions " Max Chou
2026-03-04 15:06 ` Chao Liu
2026-03-04 13:40 ` [PATCH v4 08/14] target/riscv: Expose Zvfofp8min properity Max Chou
2026-03-04 15:06 ` Chao Liu
2026-03-04 13:40 ` [PATCH v4 09/14] disas/riscv: Add support of Zvfofp8min extension Max Chou
2026-03-04 13:40 ` [PATCH v4 10/14] target/riscv: Add cfg properity for Zvfofp4min extension Max Chou
2026-03-04 15:07 ` Chao Liu
2026-03-04 13:40 ` [PATCH v4 11/14] target/riscv: Add implied rules " Max Chou
2026-03-04 13:40 ` [PATCH v4 12/14] target/riscv: rvv: Add vfext.vf2 instruction " Max Chou
2026-03-04 15:13 ` Chao Liu
2026-04-16 10:28 ` Max Chou [this message]
2026-04-17 1:59 ` Chao Liu
2026-03-04 13:40 ` [PATCH v4 13/14] target/riscv: Expose Zvfofp4min properity Max Chou
2026-03-04 15:14 ` Chao Liu
2026-03-04 13:40 ` [PATCH v4 14/14] disas/riscv: Add support of Zvfofp4min extension Max Chou
2026-03-04 15:20 ` [PATCH v4 00/14] Add OCP FP8/FP4 and RISC-V Zvfofp8min/Zvfofp4min extension support Chao Liu
2026-04-14 20:41 ` Daniel Henrique Barboza
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