From: Chris Wilson <chris@chris-wilson.co.uk>
To: Paul Menzel <paulepanter@users.sourceforge.net>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Seperate fence pin counting from normal bind pin counting
Date: Sat, 09 Jul 2011 11:32:01 +0100 [thread overview]
Message-ID: <aefc95$obpb7@orsmga001.jf.intel.com> (raw)
In-Reply-To: <1310206982.4123.98.camel@mattotaupa>
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On Sat, 09 Jul 2011 12:23:02 +0200, Paul Menzel <paulepanter@users.sourceforge.net> wrote:
> Am Samstag, den 09.07.2011, 09:25 +0100 schrieb Chris Wilson:
>
> Whoever pushes this, please correct
>
> s/Seperate/Separate/
>
> in the commit summary.
Yes, I forgot to fix the typo again.
>
> > In order to correctly account for reserving space in the GTT and fences
> > for a batch buffer, we need to independently track whether the fence is
> > pinned due to a fenced GPU access in the batch from from whether the
> > buffer is pinned in the aperture. Currently we count the fenced as
>
> »the fenced« sounds strange. Probably I need to read up the code to
> grasp that. Or is the »d« at the end a typo?
I was probably thinking of a fenced bo at the time, but the sentence reads
correctly with s/fenced/fence/.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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next prev parent reply other threads:[~2011-07-09 10:32 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-09 8:25 [PATCH] drm/i915: Seperate fence pin counting from normal bind pin counting Chris Wilson
2011-07-09 10:23 ` Paul Menzel
2011-07-09 10:32 ` Chris Wilson [this message]
2011-11-23 10:49 ` Daniel Vetter
-- strict thread matches above, loose matches on Subject: below --
2011-06-04 8:55 Chris Wilson
2011-06-04 17:38 ` Keith Packard
2011-06-04 18:31 ` Chris Wilson
2011-06-05 1:07 ` Keith Packard
2011-06-04 22:18 ` Chris Wilson
2011-06-05 20:55 ` Daniel Vetter
2011-11-13 11:00 ` Chris Wilson
2011-11-13 11:21 ` Paul Menzel
2011-11-23 12:38 ` Daniel Vetter
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