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Mon, 17 Nov 2025 11:52:18 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 222.71.101.198) smtp.mailfrom=cixtech.com; dkim=none (message not signed) header.d=none;dmarc=bestguesspass action=none header.from=cixtech.com; Received-SPF: Pass (protection.outlook.com: domain of cixtech.com designates 222.71.101.198 as permitted sender) receiver=protection.outlook.com; client-ip=222.71.101.198; helo=smtprelay.cixcomputing.com; pr=C Received: from smtprelay.cixcomputing.com (222.71.101.198) by TY2PEPF0000AB89.mail.protection.outlook.com (10.167.253.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9343.9 via Frontend Transport; Mon, 17 Nov 2025 11:52:21 +0000 Received: from [172.20.96.43] (unknown [172.20.96.43]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id C2F2E41C0145; Mon, 17 Nov 2025 19:52:19 +0800 (CST) Message-ID: Date: Mon, 17 Nov 2025 19:52:19 +0800 Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] dma: arm-dma350: add support for shared interrupt mode To: Krzysztof Kozlowski , peter.chen@cixtech.com, fugang.duan@cixtech.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, ychuang3@nuvoton.com, schung@nuvoton.com, robin.murphy@arm.com Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com, linux-arm-kernel@lists.infradead.org References: <20251117015943.2858-1-jun.guo@cixtech.com> <20251117015943.2858-3-jun.guo@cixtech.com> <22f66fbf-8637-4826-a2e6-69d16333c2b8@cixtech.com> <9b65aaf4-4204-4034-9441-5e9c888a5b0a@kernel.org> Content-Language: en-US From: Jun Guo In-Reply-To: <9b65aaf4-4204-4034-9441-5e9c888a5b0a@kernel.org> Content-Type: text/plain; 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X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2025 11:52:21.7117 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 86970560-6638-4162-5554-08de25cfc496 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: TY2PEPF0000AB89.apcprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZPR06MB6611 On 11/17/2025 7:44 PM, Krzysztof Kozlowski wrote: > On 17/11/2025 12:37, Jun Guo wrote: >>>> /* Would be nice to have per-channel caps for this... */ >>>> memset = true; >>>> for (int i = 0; i < nchan; i++) { >>>> @@ -595,10 +683,16 @@ static int d350_probe(struct platform_device *pdev) >>>> dev_warn(dev, "No command link support on channel %d\n", i); >>>> continue; >>>> } >>>> - dch->irq = platform_get_irq(pdev, i); >>>> - if (dch->irq < 0) >>>> - return dev_err_probe(dev, dch->irq, >>>> - "Failed to get IRQ for channel %d\n", i); >>>> + >>>> + if (!of_device_is_compatible(pdev->dev.of_node, >>>> + "cix,sky1-dma-350")) { >>> No, use driver match data for that. Sprinkling compatibles everywhere >>> does not scale. >>> >> I have another question: by "driver match data", are you referring to >> the data variable in the struct of_device_id? > Yes. > OK.​ Thanks for the reminder.>>> Also, this is in contrary with the binding, which did not say your >>> device has no interrupts. >> I need to clarify here: the issue with my chip platform is not the lack >> of interrupts, but that all DMA channels share a single interrupt. The >> current driver, however, defaults to assigning an individual interrupt >> for each DMA channel. > I am speaking about binding, which said that first interrupt is only for > channel 0. You need to restrict/change it for your variant. Okay, I see your point. Thanks.