Re: [PATCH v3] drm/amdgpu/gfx9: drop unnecessary 64-bit fence flag check in KIQ

["Christian König" <christian.koenig@amd.com>]

On 4/28/26 18:35, John B. Moore wrote:
> Remove the BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT) assertion from
> gfx_v9_0_ring_emit_fence_kiq().  The KIQ hardware supports 64-bit
> fence writes; the 32-bit writeback address constraint is an
> upper-layer convention, not a hardware limitation.  The check serves
> no purpose and should not be present.
> 
> Found by code inspection while investigating related BUG_ON
> assertions in the GFX and compute ring emission paths.
> 
> Signed-off-by: John B. Moore <jbmoore61@gmail.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 47e81c33d..fb2a0f1af 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -5679,9 +5679,6 @@ static void gfx_v9_0_ring_emit_fence_kiq(struct amdgpu_ring *ring, u64 addr,
>  	struct amdgpu_device *adev = ring->adev;
>  
> -	/* we only allocate 32bit for each seq wb address */
> -	BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
> -
>  	/* write fence seq to the "addr" */
>  	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
>  	amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |