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b=mx3TeLGZpd0VpDYE8DzITR9W2jd82yZLV/SzA1Gfs3zADN1MMeJL2+OYolIrKz6KxdsGRx3zVHgeOfNd59C6Ucb7TT/5Or6I7TwnO9/Z4fZ1L/gMOev3NDRt3XB6E/g856nQE+V8uxNsSg3/yOsJJusYO1Zyxby55K5l75n5ZF0= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Date: Tue, 28 Apr 2026 15:31:36 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Thierry Escande Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Anthony PERARD , Alexey Gerasimenko Subject: Re: [PATCH 08/17] hvmloader: Extend PCI BAR struct Message-ID: References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-9-thierry.escande@vates.tech> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260313163455.790692-9-thierry.escande@vates.tech> X-ClientProxiedBy: MA3P292CA0038.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:46::7) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|BN9PR03MB6026:EE_ X-MS-Office365-Filtering-Correlation-Id: dbee1e23-d5ce-417a-c42a-08dea52a7a69 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|22082099003|18002099003|56012099003; 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Either IO, MMIO, ROM or a chipset-specific resource. > > One important new field is addr_mask, which tells which bits of the base > address can (should) be written. Different address types (ROM, MMIO BAR, > PCIEXBAR) will have different addr_mask values. > > For every assignable BAR range we store its size, PCI device BDF (devfn > actually) to which it belongs, BAR type (mem/io/mem64) and corresponding > register offset in device PCI conf space. > > Also, to reduce code complexity, all long mem/mem64 BAR flags checks are > replaced by simple bars[i] field probing, eg.: > - if ( (bar_reg == PCI_ROM_ADDRESS) || > - ((bar_data & PCI_BASE_ADDRESS_SPACE) == > - PCI_BASE_ADDRESS_SPACE_MEMORY) ) > + if ( bars[i].is_mem ) I think this is also supposed to be a non-functional change, just adding new fields and adjusting the code to make use of them? > > Signed-off-by: Alexey Gerasimenko > Signed-off-by: Thierry Escande > --- > tools/firmware/hvmloader/pci.c | 58 ++++++++++++++++++++-------------- > 1 file changed, 35 insertions(+), 23 deletions(-) > > diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/pci.c > index 91c7fd2171..6e6720adae 100644 > --- a/tools/firmware/hvmloader/pci.c > +++ b/tools/firmware/hvmloader/pci.c > @@ -160,9 +160,10 @@ static void class_specific_pci_device_setup(uint16_t vendor_id, > > void pci_setup(void) > { > - uint8_t is_64bar, using_64bar, bar64_relocate = 0; > + uint8_t is_64bar, using_64bar, bar64_relocate = 0, is_mem; The newly introduce fields want to be booleans types. > uint32_t devfn, bar_reg, cmd, bar_data, bar_data_upper; > uint64_t base, bar_sz, bar_sz_upper, mmio_total = 0; > + uint64_t addr_mask; > uint8_t vga_devfn = 0xff; > uint16_t class, vendor_id, device_id; > unsigned int bar, pin, link, isa_irq; > @@ -176,10 +177,13 @@ void pci_setup(void) > > /* Create a list of device BARs in descending order of size. */ > struct bars { > - uint32_t is_64bar; > uint32_t devfn; > uint32_t bar_reg; > uint64_t bar_sz; > + uint64_t addr_mask; /* which bits of the base address can be written */ > + uint32_t bar_data; /* initial value - BAR flags here */ Hm, that's just storing the flags of the BAR, given that you already store the 64bit and memory flags, you just need the prefetch and ROM enabled booleans to have the full set, and then you can remove the bar_data field from the struct. > + uint8_t is_64bar; > + uint8_t is_mem; Use bool types please for the is_ fields. > } *bars = (struct bars *)scratch_start; > unsigned int i, nr_bars = 0; > uint64_t mmio_hole_size = 0; > @@ -278,13 +282,21 @@ void pci_setup(void) > bar_reg = PCI_ROM_ADDRESS; > > bar_data = pci_readl(devfn, bar_reg); > + > + is_mem = !!(((bar_data & PCI_BASE_ADDRESS_SPACE) == > + PCI_BASE_ADDRESS_SPACE_MEMORY) || > + (bar_reg == PCI_ROM_ADDRESS)); > + > if ( bar_reg != PCI_ROM_ADDRESS ) > { > - is_64bar = !!((bar_data & (PCI_BASE_ADDRESS_SPACE | > - PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == > - (PCI_BASE_ADDRESS_SPACE_MEMORY | > + is_64bar = !!(is_mem && > + ((bar_data & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == > PCI_BASE_ADDRESS_MEM_TYPE_64)); > + > pci_writel(devfn, bar_reg, ~0); > + > + addr_mask = is_mem ? PCI_BASE_ADDRESS_MEM_MASK > + : PCI_BASE_ADDRESS_IO_MASK; > } > else > { > @@ -292,15 +304,16 @@ void pci_setup(void) > pci_writel(devfn, bar_reg, > (bar_data | PCI_ROM_ADDRESS_MASK) & > ~PCI_ROM_ADDRESS_ENABLE); > + > + addr_mask = PCI_ROM_ADDRESS_MASK; > } > + > bar_sz = pci_readl(devfn, bar_reg); > pci_writel(devfn, bar_reg, bar_data); > > if ( bar_reg != PCI_ROM_ADDRESS ) > - bar_sz &= (((bar_data & PCI_BASE_ADDRESS_SPACE) == > - PCI_BASE_ADDRESS_SPACE_MEMORY) ? > - PCI_BASE_ADDRESS_MEM_MASK : > - (PCI_BASE_ADDRESS_IO_MASK & 0xffff)); > + bar_sz &= is_mem ? PCI_BASE_ADDRESS_MEM_MASK : > + (PCI_BASE_ADDRESS_IO_MASK & 0xffff); > else > bar_sz &= PCI_ROM_ADDRESS_MASK; > if (is_64bar) { > @@ -314,6 +327,9 @@ void pci_setup(void) > if ( bar_sz == 0 ) > continue; > > + /* leave only memtype/enable bits etc */ > + bar_data &= ~addr_mask; > + > if ( !xenpci_bar_uc && > ((bar_data & PCI_BASE_ADDRESS_SPACE) == > PCI_BASE_ADDRESS_SPACE_MEMORY) && > @@ -359,16 +375,17 @@ void pci_setup(void) > if ( i != nr_bars ) > memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars)); > > - bars[i].is_64bar = is_64bar; > bars[i].devfn = devfn; > bars[i].bar_reg = bar_reg; > bars[i].bar_sz = bar_sz; > + bars[i].is_64bar = is_64bar; > + bars[i].is_mem = is_mem; > + bars[i].addr_mask = addr_mask; > + bars[i].bar_data = bar_data; > > if ( is_64bar && bar_sz > BAR_RELOC_THRESH ) > bar64_relocate = 1; > - else if ( ((bar_data & PCI_BASE_ADDRESS_SPACE) == > - PCI_BASE_ADDRESS_SPACE_MEMORY) || > - (bar_reg == PCI_ROM_ADDRESS) ) > + else if ( is_mem ) > mmio_total += bar_sz; > > nr_bars++; > @@ -531,10 +548,10 @@ void pci_setup(void) > using_64bar = bars[i].is_64bar && bar64_relocate && > (mmio_total > (mem_resource.max - mem_resource.base) || > bar_sz > BAR_RELOC_THRESH); > - bar_data = pci_readl(devfn, bar_reg); > > - if ( (bar_data & PCI_BASE_ADDRESS_SPACE) == > - PCI_BASE_ADDRESS_SPACE_MEMORY ) > + bar_data = bars[i].bar_data; > + > + if ( bars[i].is_mem ) > { > /* Mapping high memory if PCI device is 64 bits bar */ > if ( using_64bar ) { > @@ -544,11 +561,9 @@ void pci_setup(void) > if ( !pci_hi_mem_start ) > pci_hi_mem_start = high_mem_resource.base; > resource = &high_mem_resource; > - bar_data &= ~PCI_BASE_ADDRESS_MEM_MASK; > } > else { > resource = &mem_resource; > - bar_data &= ~PCI_BASE_ADDRESS_MEM_MASK; > } > if ( bar_sz <= BAR_RELOC_THRESH ) > mmio_total -= bar_sz; > @@ -556,7 +571,6 @@ void pci_setup(void) > else > { > resource = &io_resource; > - bar_data &= ~PCI_BASE_ADDRESS_IO_MASK; > } > > base = (resource->base + bar_sz - 1) & ~(uint64_t)(bar_sz - 1); > @@ -578,7 +592,7 @@ void pci_setup(void) > } > } > > - bar_data |= (uint32_t)base; > + bar_data |= (uint32_t) (base & bars[i].addr_mask); ^ unintended space? Thanks, Roger.