Re: [PATCH 5/6] tests: Implement aspeed_i2c_restart to reenable selection of master

[Arun Menon <armenon@redhat.com>]

Hi,

On Tue, Apr 28, 2026 at 01:07:17PM +0000, Stefan Berger wrote:
> For some TPM  I2C tests it is important to be able to reenable the
> selection of the master. Implement aspeed_i2c_restart to enable this.
> 
> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
> ---
>  tests/qtest/qtest_aspeed.c | 8 +++++++-
>  tests/qtest/qtest_aspeed.h | 2 ++
>  2 files changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/qtest/qtest_aspeed.c b/tests/qtest/qtest_aspeed.c
> index f6da9adea9..13934cc660 100644
> --- a/tests/qtest/qtest_aspeed.c
> +++ b/tests/qtest/qtest_aspeed.c
> @@ -15,11 +15,17 @@
>  #include "qtest_aspeed.h"
>  #include "hw/i2c/aspeed_i2c.h"
>  
> +static int once;

can we make this a boolean?

> +
> +void aspeed_i2c_restart(void)
> +{
> +    once = false;
> +}
> +
>  static void aspeed_i2c_startup(QTestState *s, uint32_t baseaddr,
>                                 uint8_t slave_addr, uint8_t reg)
>  {
>      uint32_t v;
> -    static int once;

Can we check if the A_I2CD_MASTER_EN bit is set directly without having
the need to store a global static variable? For example:

static bool is_aspeed_i2c_master_enabled(QTestState *s, uint32_t baseaddr)
{
    uint32_t reg_val;

    return ((qtest_readl(s, baseaddr + A_I2CC_FUN_CTRL)
            & A_I2CD_MASTER_EN) != 0);
}
>  
and use it here:
>      if (!once) {
if (!is_aspeed_i2c_master_enabled(s, baseaddr)) {


for restarts, we can directly write to the register
  qtest_writel(s, bus_addr + A_I2CC_FUN_CTRL, 0);
and the subsequent call to aspeed_i2c_startup() will handle the init properly.

>          /* one time: enable master */
> diff --git a/tests/qtest/qtest_aspeed.h b/tests/qtest/qtest_aspeed.h
> index d35b0c7cba..c0a095bb46 100644
> --- a/tests/qtest/qtest_aspeed.h
> +++ b/tests/qtest/qtest_aspeed.h
> @@ -23,6 +23,8 @@ static inline uint32_t ast2600_i2c_calc_bus_addr(uint8_t bus_num)
>      return AST2600_ASPEED_I2C_BASE_ADDR + 0x80 + bus_num * 0x80;
>  }
>  
> +void aspeed_i2c_restart(void);
> +
>  uint8_t aspeed_i2c_readb(QTestState *s,
>                           uint32_t baseaddr, uint8_t slave_addr, uint8_t reg);
>  uint16_t aspeed_i2c_readw(QTestState *s,
> -- 
> 2.43.0
> 

Regards,
Arun Menon