From: "Ahmed S. Darwish" <darwi@linutronix.de>
To: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>,
Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Sean Christopherson <seanjc@google.com>,
David Woodhouse <dwmw2@infradead.org>,
Peter Zijlstra <peterz@infradead.org>,
Christian Ludloff <ludloff@gmail.com>,
Sohil Mehta <sohil.mehta@intel.com>,
John Ogness <john.ogness@linutronix.de>,
x86@kernel.org, x86-cpuid@lists.linux.dev,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 00/90] x86: Introduce a centralized CPUID data model
Date: Wed, 6 May 2026 22:52:01 +0200 [thread overview]
Message-ID: <afup8Zf9cmmACdoh@lx-t490> (raw)
In-Reply-To: <20260505151242.GDafoI6oOOs9hknrrK@fat_crate.local>
Hi Boris,
On Tue, 05 May 2026, Borislav Petkov wrote:
>
> Ok, talked it over with tglx - he brought up the argument that actually
> having those flags documented is good for other tools like crash, etc,
> where you want to consult a single db for *all* X86_FEATURE flags in the
> kernel - no matter how they're defined.
>
> So, what we will do is, we'll leave those leafs as is and not touch them.
>
> If we need to add new, solely synthetic bits, we'll add them where
> there's room, document them in the db and that's it. Synthetic bits will
> be add-only and the cpuid-db will collect them.
>
> This way you have a single source for all CPUID info.
>
> The scattered.c thing goes away because we have full CPUID leaf
> representation now.
>
> We only get purely synthetic new additions to the db and we can use the
> Lx namespace for that. I guess that's plenty of room for the foreseeable
> future.
>
> Makes sense?
>
Yes, I think so.
"scattered.c thing goes away" in the sense that:
No new hardware-backed X86_FEATURE synthetic bit will ever be added to
the kernel. Now that a full CPUID table exists, the standard CPUID
APIs should be used for such cases instead.
Thus, "We only get purely synthetic new additions to the db."
For the /current/ scattered feature bits, the array which maps them to
their hardware backing:
static const struct cpuid_bit cpuid_bits[] = {
{ X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 },
{ X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 },
{ ... },
}
is needed. The direct CPUID calls at scattered.c will just need to be
converted to their equivalent CPUID APIs though.
(I guess that's what you already meant, but I wanted to be sure.)
Thanks,
Ahmed
next prev parent reply other threads:[~2026-05-06 20:52 UTC|newest]
Thread overview: 149+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-27 2:15 [PATCH v6 00/90] x86: Introduce a centralized CPUID data model Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 01/90] ASoC: Intel: avs: Check maximum valid CPUID leaf Ahmed S. Darwish
2026-03-27 9:26 ` Cezary Rojewski
2026-03-27 23:52 ` [tip: x86/cpu] " tip-bot2 for Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 02/90] ASoC: Intel: avs: Include CPUID header at file scope Ahmed S. Darwish
2026-03-27 9:25 ` Cezary Rojewski
2026-03-27 2:15 ` [PATCH v6 03/90] tools/x86/kcpuid: Update bitfields to x86-cpuid-db v3.0 Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 04/90] treewide: Explicitly include the x86 CPUID headers Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 05/90] x86/cpu: <asm/processor.h>: Do not include the CPUID API header Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 06/90] x86/cpuid: Rename cpuid_leaf()/cpuid_subleaf() APIs Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 07/90] x86/cpuid: Introduce <asm/cpuid/leaf_types.h> Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 08/90] x86: Introduce a centralized CPUID data model Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 09/90] x86/cpuid: Introduce a centralized CPUID parser Ahmed S. Darwish
2026-04-15 6:09 ` Maciej Wieczor-Retman
2026-04-27 19:42 ` Ahmed S. Darwish
2026-04-28 15:03 ` Maciej Wieczor-Retman
2026-03-27 2:15 ` [PATCH v6 10/90] x86/cpu: Rescan CPUID table after disabling PSN Ahmed S. Darwish
2026-05-11 20:00 ` Borislav Petkov
2026-05-12 7:12 ` Ahmed S. Darwish
2026-05-12 14:34 ` Borislav Petkov
2026-05-13 15:27 ` Borislav Petkov
2026-05-13 16:06 ` Ahmed S. Darwish
2026-05-13 16:51 ` Borislav Petkov
2026-05-13 17:09 ` Borislav Petkov
2026-05-13 17:21 ` H. Peter Anvin
2026-05-13 17:25 ` Ahmed S. Darwish
2026-05-13 17:38 ` Borislav Petkov
2026-05-13 17:48 ` Ahmed S. Darwish
2026-05-14 4:47 ` Christian Ludloff
2026-05-13 15:57 ` Ahmed S. Darwish
2026-05-13 16:25 ` Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 11/90] x86/cpu: centaur/zhaoxin: Rescan CPUID(0xc0000001) after MSR writes Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 12/90] x86/cpu/transmeta: Rescan CPUID(0x1) after capability unhide Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 13/90] x86/cpu/intel: Rescan CPUID table after leaf unlock Ahmed S. Darwish
2026-04-15 12:36 ` Maciej Wieczor-Retman
2026-04-27 20:01 ` Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 14/90] x86/cpu: Use parsed CPUID(0x0) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 15/90] x86/lib: Add CPUID(0x1) family and model calculation Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 16/90] x86/cpu: Use parsed CPUID(0x1) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 17/90] x86/cpuid: Parse CPUID(0x80000000) Ahmed S. Darwish
2026-04-15 16:21 ` Maciej Wieczor-Retman
2026-03-27 2:15 ` [PATCH v6 18/90] x86/cpu: Use parsed CPUID(0x80000000) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 19/90] x86/cpuid: Parse CPUID(0x80000002) to CPUID(0x80000004) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 20/90] x86/cpu: Use parsed " Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 21/90] x86/cpuid: Split parser tables and add vendor-qualified parsing Ahmed S. Darwish
2026-04-15 19:45 ` Maciej Wieczor-Retman
2026-04-29 10:04 ` Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 22/90] x86/cpuid: Introduce a parser debugfs interface Ahmed S. Darwish
2026-04-15 20:34 ` Maciej Wieczor-Retman
2026-03-27 2:15 ` [PATCH v6 23/90] x86/cpuid: Parse CPUID(0x16) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 24/90] x86/tsc: Use parsed CPUID(0x16) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 25/90] x86/cpuid: Parse Transmeta and Centaur extended ranges Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 26/90] x86/cpu: transmeta: Use parsed CPUID(0x80860000)->CPUID(0x80860006) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 27/90] x86/cpu: transmeta: Refactor CPU information printing Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 28/90] x86/cpu: centaur: Use parsed CPUID(0xc0000001) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 29/90] x86/cpu: zhaoxin: " Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 30/90] x86/cpuid: Parse CPUID(0x2) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 31/90] x86/cpuid: Warn once on invalid CPUID(0x2) iteration count Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 32/90] x86/cpuid: Introduce parsed CPUID(0x2) API Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 33/90] x86/cpu: Use parsed CPUID(0x2) Ahmed S. Darwish
2026-04-16 19:16 ` Maciej Wieczor-Retman
2026-03-27 2:15 ` [PATCH v6 34/90] x86/cacheinfo: " Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 35/90] x86/cpuid: Remove direct CPUID(0x2) query helpers Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 36/90] x86/cpuid: Parse deterministic cache parameters CPUID leaves Ahmed S. Darwish
2026-04-17 9:20 ` Maciej Wieczor-Retman
2026-03-27 2:15 ` [PATCH v6 37/90] x86/cacheinfo: Pass a 'struct cpuinfo_x86' refrence to CPUID(0x4) code Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 38/90] x86/cacheinfo: Use parsed CPUID(0x4) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 39/90] x86/cacheinfo: Use parsed CPUID(0x8000001d) Ahmed S. Darwish
2026-04-17 14:47 ` Maciej Wieczor-Retman
2026-03-27 2:15 ` [PATCH v6 40/90] x86/cpuid: Parse CPUID(0x80000005), CPUID(0x80000006), CPUID(0x80000008) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 41/90] x86/cacheinfo: Use auto-generated data types Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 42/90] x86/cacheinfo: Use parsed CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 43/90] x86/cacheinfo: Use parsed CPUID(0x80000006) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 44/90] x86/cpu: Use parsed CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2026-03-27 2:15 ` [PATCH v6 45/90] x86/cpu/amd: Use parsed CPUID(0x80000005) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 46/90] x86/cpu/amd: Refactor TLB detection code Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 47/90] x86/cpu/amd: Use parsed CPUID(CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 48/90] x86/cpu/hygon: Use parsed CPUID(0x80000005) " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 49/90] x86/cpu/centaur: Use parsed CPUID(0x80000005) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 50/90] x86/cpu: Use parsed CPUID(0x80000008) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 51/90] x86/cpuid: Parse CPUID(0xa) and CPUID(0x1c) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 52/90] x86/cpu/intel: Use parsed CPUID(0xa) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 53/90] x86/cpu/centaur: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 54/90] x86/cpu/zhaoxin: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 55/90] perf/x86/intel: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 56/90] perf/x86/zhaoxin: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 57/90] x86/xen: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 58/90] KVM: x86: Use standard CPUID(0xa) types Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 59/90] KVM: x86/pmu: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 60/90] perf/x86: Remove custom " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 61/90] perf/x86/lbr: Use parsed CPUID(0x1c) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 62/90] perf/x86/lbr: Remove custom CPUID(0x1c) types Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 63/90] x86/cpuid: Parse CPUID(0x23) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 64/90] perf/x86/intel: Use parsed per-CPU CPUID(0x23) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 65/90] perf/x86/intel: Remove custom CPUID(0x23) types Ahmed S. Darwish
2026-04-20 20:07 ` Maciej Wieczor-Retman
2026-03-27 2:16 ` [PATCH v6 66/90] x86/cpuid: Parse CPUID(0x80000022) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 67/90] perf/x86/amd/lbr: Use parsed CPUID(0x80000022) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 68/90] perf/x86/amd: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 69/90] KVM: x86: Use standard CPUID(0x80000022) types Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 70/90] perf/x86: Remove custom " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 71/90] x86/cpuid: Parse CPUID(0x80000007) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 72/90] x86/cpu: Use parsed CPUID(0x80000007) Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 73/90] x86/cpu: amd/hygon: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 74/90] x86/cpu: cpuinfo: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 75/90] KVM: x86: " Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 76/90] x86/microcode: Allocate cpuinfo_x86 snapshots on the heap Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 77/90] x86/cpuid: Parse leaves backing X86_FEATURE words Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 78/90] x86/cpuid: Parse Linux synthetic CPUID leaves Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 79/90] x86/cpuid: Introduce a compile-time X86_FEATURE word map Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 80/90] x86/cpuid: Introduce X86_FEATURE and CPUID word APIs Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 81/90] x86/percpu: Add offset argument to x86_this_cpu_test_bit() Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 82/90] x86/cpufeature: Factor out a __static_cpu_has() helper Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 83/90] x86/asm/32: Cache CPUID(0x1).EDX in cpuid_table Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 84/90] x86: Route all feature queries to the CPUID tables Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 85/90] x86/cpu: Remove x86_capability[] and x86_power initialization Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 86/90] x86/cpu/transmeta: Remove x86_capability[] CPUID initialization Ahmed S. Darwish
2026-03-27 20:35 ` kernel test robot
2026-03-27 20:58 ` kernel test robot
2026-03-27 22:56 ` kernel test robot
2026-03-27 2:16 ` [PATCH v6 87/90] x86/cpu: centaur/zhaoxin: Remove x86_capability[] initialization Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 88/90] KVM: x86: Remove BUILD_BUG_ON() x86_capability[] check Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 89/90] x86/cpu: Remove x86_capability[] and x86_power Ahmed S. Darwish
2026-03-27 2:16 ` [PATCH v6 90/90] MAINTAINERS: Extend x86 CPUID DATABASE file coverage Ahmed S. Darwish
2026-03-27 15:23 ` [PATCH v6 00/90] x86: Introduce a centralized CPUID data model Borislav Petkov
2026-03-30 18:29 ` Ahmed S. Darwish
2026-03-30 23:08 ` Borislav Petkov
2026-04-13 14:03 ` Ahmed S. Darwish
2026-04-27 18:45 ` Ahmed S. Darwish
2026-05-05 13:33 ` Borislav Petkov
2026-05-05 15:12 ` Borislav Petkov
2026-05-05 19:11 ` Christian Ludloff
2026-05-06 8:50 ` Borislav Petkov
2026-05-06 13:59 ` H. Peter Anvin
2026-05-06 14:58 ` Borislav Petkov
2026-05-06 18:13 ` Christian Ludloff
2026-05-06 21:57 ` Ahmed S. Darwish
2026-05-06 22:18 ` Borislav Petkov
2026-05-06 23:03 ` Christian Ludloff
2026-05-06 20:52 ` Ahmed S. Darwish [this message]
2026-05-07 10:17 ` Borislav Petkov
2026-05-07 20:02 ` Ahmed S. Darwish
2026-04-07 10:09 ` Maciej Wieczor-Retman
2026-04-13 14:38 ` Ahmed S. Darwish
2026-04-21 17:27 ` Maciej Wieczor-Retman
2026-04-29 10:09 ` Ahmed S. Darwish
-- strict thread matches above, loose matches on Subject: below --
2026-04-07 8:55 Maciej Wieczor-Retman
2026-04-07 8:59 ` Borislav Petkov
2026-04-14 15:10 Maciej Wieczor-Retman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=afup8Zf9cmmACdoh@lx-t490 \
--to=darwi@linutronix.de \
--cc=andrew.cooper3@citrix.com \
--cc=bp@alien8.de \
--cc=dave.hansen@linux.intel.com \
--cc=dwmw2@infradead.org \
--cc=hpa@zytor.com \
--cc=john.ogness@linutronix.de \
--cc=linux-kernel@vger.kernel.org \
--cc=ludloff@gmail.com \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=seanjc@google.com \
--cc=sohil.mehta@intel.com \
--cc=tglx@linutronix.de \
--cc=x86-cpuid@lists.linux.dev \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.