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From: Chao Liu <chao.liu.zevorn@gmail.com>
To: Jay Chang <jay.chang@sifive.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	 Weiwei Li <liwei1518@gmail.com>,
	Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,
	 Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH v5 2/2] target/riscv: Improve PMP address alignment readability
Date: Wed, 20 May 2026 15:06:09 +0800	[thread overview]
Message-ID: <ag1dVm-bG_bOJwJC@ChaodeMacBook-Pro.local> (raw)
In-Reply-To: <20260520063606.36600-3-jay.chang@sifive.com>

On Wed, May 20, 2026 at 02:36:06PM +0800, Jay Chang wrote:
> Replace manual bit manipulation for better readability:
> 
> - TOR: Use ROUND_DOWN() to clear lower bits
> - NAPOT: Use deposit64() to set lower bits
> 
> Signed-off-by: Jay Chang <jay.chang@sifive.com>
Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>

> ---
>  target/riscv/pmp.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
> index 8adf7c9719..58a8923d0d 100644
> --- a/target/riscv/pmp.c
> +++ b/target/riscv/pmp.c
> @@ -247,8 +247,9 @@ void pmp_update_rule_addr(CPURISCVState *env, uint32_t pmp_index)
>      case PMP_AMATCH_TOR:
>          /* Bits pmpaddr[G-1:0] do not affect the TOR address-matching logic. */
>          if (g >= 1) {
> -            prev_addr &= ~((1ULL << g) - 1ULL);
> -            this_addr &= ~((1ULL << g) - 1ULL);
> +            uint64_t granule = 1ULL << g;
> +            prev_addr = ROUND_DOWN(prev_addr, granule);
> +            this_addr = ROUND_DOWN(this_addr, granule);
>          }
>          if (prev_addr >= this_addr) {
>              sa = ea = 0u;
> @@ -641,13 +642,14 @@ target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index)
>          case PMP_AMATCH_TOR:
>              /* Bit [g-1:0] read all zero */
>              if (g >= 1 && g < TARGET_LONG_BITS) {
> -                val &= ~((1ULL << g) - 1ULL);
> +                uint64_t granule = 1ULL << g;
> +                val = ROUND_DOWN(val, granule);
>              }
>              break;
>          case PMP_AMATCH_NAPOT:
>              /* Bit [g-2:0] read all one */
>              if (g >= 2 && g < TARGET_LONG_BITS) {
> -                val |= ((1ULL << (g - 1)) - 1ULL);
> +                val = deposit64(val, 0, g - 1, -1ULL);
>              }
>              break;
>          default:
> -- 
> 2.48.1
> 


  reply	other threads:[~2026-05-20  7:07 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-20  6:36 [PATCH v5 0/2] target/riscv: Fix PMP address alignment Jay Chang
2026-05-20  6:36 ` [PATCH v5 1/2] target/riscv: Align pmp size to pmp-granularity Jay Chang
2026-05-20  7:05   ` Chao Liu
2026-05-20  6:36 ` [PATCH v5 2/2] target/riscv: Improve PMP address alignment readability Jay Chang
2026-05-20  7:06   ` Chao Liu [this message]
2026-05-26  2:23   ` Alistair Francis
2026-05-20  6:50 ` [PATCH v5 0/2] target/riscv: Fix PMP address alignment Philippe Mathieu-Daudé
2026-05-26  2:24 ` Alistair Francis

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