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Thu, 21 May 2026 01:19:22 -0700 (PDT) Received: from localhost ([64.186.250.142]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-302977a9474sm20774549eec.25.2026.05.21.01.19.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 01:19:22 -0700 (PDT) Date: Thu, 21 May 2026 16:19:18 +0800 From: Chao Liu To: Anton Johansson Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, philmd@linaro.org, pierrick.bouvier@oss.qualcomm.com, palmer@dabbelt.com, alistair.francis@wdc.com Subject: Re: [PATCH v3 06/14] target-info: Add target_riscv64() Message-ID: References: <20260520-hw-riscv-cpu-int-v3-0-d1123ea63d9c@rev.ng> <20260520-hw-riscv-cpu-int-v3-6-d1123ea63d9c@rev.ng> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260520-hw-riscv-cpu-int-v3-6-d1123ea63d9c@rev.ng> Received-SPF: pass client-ip=2607:f8b0:4864:20::1344; envelope-from=chao.liu.zevorn@gmail.com; helo=mail-dy1-x1344.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, May 20, 2026 at 03:12:58PM +0800, Anton Johansson via wrote: > Adds a helper function to tell if the binary is targeting riscv64 or > not. > > Reviewed-by: Pierrick Bouvier > Signed-off-by: Anton Johansson > --- > include/qemu/target-info.h | 7 +++++++ > target-info.c | 5 +++++ > 2 files changed, 12 insertions(+) > > diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h > index 23c997de54..6c5b714288 100644 > --- a/include/qemu/target-info.h > +++ b/include/qemu/target-info.h > @@ -99,4 +99,11 @@ bool target_ppc64(void); > */ > bool target_s390x(void); > > +/** There’s one extra * character here; otherwise LGTM. Reviewed-by: Chao Liu Thanks, Chao > + * target_riscv64: > + * > + * Returns whether the target architecture is riscv64 > + */ > +bool target_riscv64(void); > + > #endif > diff --git a/target-info.c b/target-info.c > index 28c458fc7a..04c69c41f8 100644 > --- a/target-info.c > +++ b/target-info.c > @@ -93,3 +93,8 @@ bool target_s390x(void) > { > return target_arch() == SYS_EMU_TARGET_S390X; > } > + > +bool target_riscv64(void) > +{ > + return target_arch() == SYS_EMU_TARGET_RISCV64; > +} > > -- > 2.52.0 > >