From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/i915/dp: Detect changes in common link parameters
Date: Fri, 22 May 2026 00:43:41 +0300 [thread overview]
Message-ID: <ag98jVxomfBDkzQ4@intel.com> (raw)
In-Reply-To: <20260518112427.2460725-6-imre.deak@intel.com>
On Mon, May 18, 2026 at 02:24:26PM +0300, Imre Deak wrote:
> Detect DPRX capability changes without a long HPD or RX_CAP_CHANGED
> signal and queue a corresponding link params reset.
>
> Besides detecting the above unexpected capability changes, this also
> avoids races between queuing and handling a deferred link params reset.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 50 +++++++++++++++++++++----
> 1 file changed, 43 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 6c4dadfc35806..dd968c2d9fa64 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -362,19 +362,25 @@ int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port)
> return max_lanes;
> }
>
> -/* Theoretical max between source and sink */
> -static void intel_dp_set_max_common_lane_count(struct intel_dp *intel_dp)
> +/*
> + * Theoretical max between source and sink.
> + * Return %true if the max common lane count changed.
> + */
> +static bool intel_dp_set_max_common_lane_count(struct intel_dp *intel_dp)
> {
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> int source_max = intel_dp_max_source_lane_count(dig_port);
> int sink_max = intel_dp->max_sink_lane_count;
> int lane_max = intel_tc_port_max_lane_count(dig_port);
> int lttpr_max = drm_dp_lttpr_max_lane_count(intel_dp->lttpr_common_caps);
> + int old_max_common_lane_count = intel_dp->max_common_lane_count;
>
> if (lttpr_max)
> sink_max = min(sink_max, lttpr_max);
>
> intel_dp->max_common_lane_count = min3(source_max, sink_max, lane_max);
> +
> + return intel_dp->max_common_lane_count != old_max_common_lane_count;
> }
>
> int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
> @@ -792,13 +798,20 @@ int intel_dp_link_config_index(struct intel_dp *intel_dp, int link_rate, int lan
> return -1;
> }
>
> -static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
> +/* Return %true if the common rates changed. */
> +static bool intel_dp_set_common_rates(struct intel_dp *intel_dp)
> {
> struct intel_display *display = to_intel_display(intel_dp);
> + int num_old_common_rates = intel_dp->num_common_rates;
> + int old_common_rates[DP_MAX_SUPPORTED_RATES];
>
> drm_WARN_ON(display->drm,
> !intel_dp->num_source_rates || !intel_dp->num_sink_rates);
>
> + static_assert(sizeof(old_common_rates) == sizeof(intel_dp->common_rates));
Could also assert the element size/type match. Maybe (as a followup
later) introduce a proper type for this rates[]+num construct and then
we could just copy the darn thing with a normal assignment and not have
to worry about this kind of stuff at all...
> + memcpy(old_common_rates, intel_dp->common_rates,
> + num_old_common_rates * sizeof(old_common_rates[0]));
> +
> intel_dp->num_common_rates = intersect_rates(intel_dp->source_rates,
> intel_dp->num_source_rates,
> intel_dp->sink_rates,
> @@ -810,13 +823,26 @@ static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
> intel_dp->common_rates[0] = 162000;
> intel_dp->num_common_rates = 1;
> }
> +
> + return num_old_common_rates != intel_dp->num_common_rates ||
> + memcmp(old_common_rates, intel_dp->common_rates,
> + num_old_common_rates * sizeof(old_common_rates[0]));
> }
>
> -static void intel_dp_set_common_link_params(struct intel_dp *intel_dp)
> +/* Return %true if any common link param changed. */
> +static bool intel_dp_set_common_link_params(struct intel_dp *intel_dp)
> {
> - intel_dp_set_common_rates(intel_dp);
> - intel_dp_set_max_common_lane_count(intel_dp);
> + bool params_changed = false;
> +
> + if (intel_dp_set_common_rates(intel_dp))
> + params_changed = true;
> +
> + if (intel_dp_set_max_common_lane_count(intel_dp))
> + params_changed = true;
> +
> intel_dp_link_config_init(intel_dp);
> +
> + return params_changed;
> }
>
> bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
> @@ -4911,9 +4937,19 @@ intel_dp_has_sink_count(struct intel_dp *intel_dp)
>
> void intel_dp_update_sink_caps(struct intel_dp *intel_dp)
> {
> + struct intel_display *display = to_intel_display(intel_dp);
> +
> intel_dp_set_sink_rates(intel_dp);
> intel_dp_set_max_sink_lane_count(intel_dp);
> - intel_dp_set_common_link_params(intel_dp);
> + /*
> + * Handle unexpected sink cap changes, or a race between setting
> + * the deferred link params flag in the HPD IRQ handler and
> + * clearing the flag during connector detect.
> + */
> + if (intel_dp_set_common_link_params(intel_dp) &&
> + intel_dp_reset_link_params_defer(intel_dp))
> + drm_dbg_kms(display->drm,
> + "DPRX capabilities changed before long HPD or RX_CAP_CHANGED signal\n");
> }
>
> static bool
> --
> 2.49.1
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2026-05-21 21:43 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
2026-05-18 11:24 ` [PATCH 1/5] drm/i915/dp: Add helpers to reset link params Imre Deak
2026-05-21 21:36 ` Ville Syrjälä
2026-05-22 7:36 ` Hogander, Jouni
2026-05-22 7:47 ` Imre Deak
2026-05-22 10:29 ` Jani Nikula
2026-05-22 12:39 ` Ville Syrjälä
2026-05-22 12:46 ` Jani Nikula
2026-05-22 12:50 ` Ville Syrjälä
2026-05-22 15:32 ` Imre Deak
2026-05-18 11:24 ` [PATCH 2/5] drm/i915/dp: Reset link params after a DPRX capability change Imre Deak
2026-05-18 11:24 ` [PATCH 3/5] drm/i915/dp: Add helper to set common link params Imre Deak
2026-05-22 7:20 ` Hogander, Jouni
2026-05-18 11:24 ` [PATCH 4/5] drm/i915/dp: Cache max common lane count Imre Deak
2026-05-22 7:21 ` Hogander, Jouni
2026-05-18 11:24 ` [PATCH 5/5] drm/i915/dp: Detect changes in common link parameters Imre Deak
2026-05-21 21:43 ` Ville Syrjälä [this message]
2026-05-22 7:54 ` Imre Deak
2026-05-18 12:01 ` ✓ CI.KUnit: success for drm/i915/dp: Sanitize link capability change handling Patchwork
2026-05-18 12:41 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-18 14:09 ` ✗ i915.CI.BAT: failure " Patchwork
2026-05-18 16:04 ` ✗ Xe.CI.FULL: " Patchwork
2026-05-18 16:52 ` ✓ i915.CI.BAT: success for drm/i915/dp: Sanitize link capability change handling (rev2) Patchwork
2026-05-19 5:53 ` ✓ i915.CI.Full: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ag98jVxomfBDkzQ4@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=imre.deak@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.