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The chip address byte (0x9E/0x9F) is placed in the > > high byte > > > + * via write_flag_mask / read_flag_mask, and the MAP register address > > occupies > > > + * the low byte. This produces the correct 3-byte on-wire frame without > > any > > > + * custom bus implementation: > > > + * > > > + * write: [0x9E, MAP_addr, data] > > > + * read: [0x9F, MAP_addr] -> [data] > > > > What about INCR? > > > > Indeed. This patch doesn't handle INCR. I'll enable INCR after reworking > on write_flag_mask/read_flag_mask. > I don't think the driver does anything that reads/writes more than a single register, so one could probably just set use_single_read/write and punt on handling INCR for now. > > > +static const struct of_device_id cs42xx8_of_match[] = { > > > + { .compatible = "cirrus,cs42448", .data = &cs42448_data, }, > > > + { .compatible = "cirrus,cs42888", .data = &cs42888_data, }, > > > + { /* sentinel */ } > > > +}; > > > +MODULE_DEVICE_TABLE(of, cs42xx8_of_match); > > > > This should have an update to the bindings as well. Thanks sorry missed that. Thanks, Charles