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[34.124.234.44]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2bf1e609a0asm1939385ad.26.2026.05.28.13.39.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 May 2026 13:39:18 -0700 (PDT) Date: Thu, 28 May 2026 20:39:11 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: Nicolin Chen , will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, bhelgaas@google.com, baolu.lu@linux.intel.com, kevin.tian@intel.com, miko.lenczewski@arm.com, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, dan.j.williams@intel.com, jonathan.cameron@huawei.com, vsethi@nvidia.com, linux-cxl@vger.kernel.org, nirmoyd@nvidia.com Subject: Re: [PATCH v6 3/3] iommu/arm-smmu-v3: Allow ATS to be always on Message-ID: References: <18bb6f421b3be891caa8f1fb50f3a4d56b52d5be.1779392420.git.nicolinc@nvidia.com> <20260528152930.GA3195266@nvidia.com> <20260528180018.GB3195266@nvidia.com> <20260528200450.GC3195266@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260528200450.GC3195266@nvidia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260528_133920_404793_75D9B3DB X-CRM114-Status: GOOD ( 26.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, May 28, 2026 at 05:04:50PM -0300, Jason Gunthorpe wrote: > On Thu, May 28, 2026 at 11:20:35AM -0700, Nicolin Chen wrote: > > On Thu, May 28, 2026 at 06:14:57PM +0000, Pranjal Shrivastava wrote: > > > On Thu, May 28, 2026 at 03:00:18PM -0300, Jason Gunthorpe wrote: > > > > On Thu, May 28, 2026 at 04:32:23PM +0000, Pranjal Shrivastava wrote: > > > > > On Thu, May 28, 2026 at 12:29:30PM -0300, Jason Gunthorpe wrote: > > > > > > On Thu, May 28, 2026 at 03:24:40PM +0000, Pranjal Shrivastava wrote: > > > > > > > > > > > > > > + master->ats_always_on = true; > > > > > > > > + > > > > > > > > + return arm_smmu_alloc_cd_tables(master); > > > > > > > > > > > > > > Nit: I'm not sure if I'm getting this right, are we saying we *need* to > > > > > > > allocate CDs for CXL.cache cases in the probe itself because STE.EATS > > > > > > > requires Config=Translate with S1DSS in bypass? > > > > > > > > > > > > Yeah, basically. > > > > > > > > > > > > Effectively the ARM rules for enabling ATS and Bypass together require > > > > > > a valid CD table pointer. > > > > > > > > > > Ack. But do we expect transactions before attach_dev? What'd happen if > > > > > we don't allocate CDs here? > > > > > > > > It can be done at any point before a non-abort STE is formed. > > > > > > > > The core code pretty much does this immediately after probe so there > > > > isn't much point in moving it later. > > > > > > > > > > Right.. that's what I'm not understanding clearly, if the STE is Abort > > > anyway during probe, why are we breaking the alloc-at-attach convention? > > > Usually, we allocate CD tables in the first attach_dev call. Why does > > > that not work here? > > > > It would work in attach_dev(). I just felt cleaner to have it in > > probe(), paired with arm_smmu_free_cd_tables() in the release(). > > I thought it was like this because we don't have an alloc on attach > flow for the identity domain, so add it there or add it here.. Right, doing it in attach would've been cleaner, but I don't mind the existing way too (since it's merged anyway) I went down this hole since the reason for the convention change wasn't immediately clear. Thanks for the clarification! Praan