From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 885153FCB1E for ; Fri, 26 Jun 2026 17:11:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782493898; cv=none; b=jpnf0rIBij45kDZYHCDsErWtFdvxX2fFBGI6s0ABZ86yl/WbM2cVZrDKm6s73K49XuNtCuFXeMTF++am473uGK3Y+9HLm4cKggQLGBSbEO9hOis2tfc0iCHYVkAzN40+1bFfhqdlSoHfTjuPv0L5HbBYeXI7aDBJvy756gJvGpA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782493898; c=relaxed/simple; bh=2Utd0N86MYNjJo+OrS+WeKcY0n7FZPkf9EAQgABOrpw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=PMBzYt2HIhifXSzsq809nQ4JNruJcad4HxVkksviQZyDph1FCzLBjDNV5WETyzUvnMhp9QKAzVOwDsvyAmZ8hyAVutvOvRjfFdI9pZusG+wgnD6hgVUfQ+bK4SfEW4xADATJllkulSZvpWht5HD7xq3Cbd/xf4cWVDO26iE9AHE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=mWabBNRI; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="mWabBNRI" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2EEAA1F60; Fri, 26 Jun 2026 10:11:30 -0700 (PDT) Received: from arm.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BFA563F632; Fri, 26 Jun 2026 10:11:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1782493894; bh=2Utd0N86MYNjJo+OrS+WeKcY0n7FZPkf9EAQgABOrpw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=mWabBNRIZ+FuDwevXn80U/01DGm1UIj9+lSegSodD3K4KHVC5SqDQuvu1fCVjKaNq tYVHSozu47HG5f0KDSGbuppXwpLz97F0fMxy9j6Tc/eZzmaw0vCN3TUPdT3W0MowWD wxjnNqas9sm94L4ui9R6FbMysK3ZODCWqtouZ+Ho= Date: Fri, 26 Jun 2026 18:11:29 +0100 From: Catalin Marinas To: Kiryl Shutsemau Cc: Will Deacon , James Morse , Mark Rutland , Marc Zyngier , Doug Anderson , Petr Mladek , Thomas Gleixner , Andrew Morton , Baoquan He , Puranjay Mohan , Usama Arif , Breno Leitao , Julien Thierry , Lecopzer Chen , Sumit Garg , kernel-team@meta.com, kexec@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, "Kiryl Shutsemau (Meta)" Subject: Re: [PATCH v4 3/4] drivers/firmware: add SDEI cross-CPU NMI service for arm64 Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Jun 17, 2026 at 08:20:04PM +0100, Kiryl Shutsemau wrote: > +/* > + * Raise callback for nmi_trigger_cpumask_backtrace(): signal event 0 > + * at every CPU still pending in @mask. The framework excludes the local > + * CPU from @mask before calling us. > + */ > +static void sdei_nmi_raise_backtrace(cpumask_t *mask) > +{ > + unsigned int cpu; > + > + for_each_cpu(cpu, mask) > + sdei_nmi_fire(cpu); > +} Does this need a barrier as in patch 4? Sashiko spotted that backtrace_mask won't be visible without a dsb(ishst). Again, as per my comment in patch 4, we get away with this because of the TF-A implementation but that's not guaranteed (we could ask for the SDEI spec to be updated assuming all firmware implementations do this). -- Catalin