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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v3 2/2] drm/i915/dsb: Use safe window path when VRR TG is used
Date: Thu, 18 Jun 2026 21:29:05 +0300	[thread overview]
Message-ID: <ajQ48VoKc1Do6pre@intel.com> (raw)
In-Reply-To: <20260617051417.2223526-1-ankit.k.nautiyal@intel.com>

On Wed, Jun 17, 2026 at 10:44:17AM +0530, Ankit Nautiyal wrote:
> When the VRR timing generator is always used, the hardware behaves
> as VRR-active regardless of crtc_state->vrr.enable.
> 
> The DSB paths that depend on the VRR safe window therefore need to follow
> the VRR code paths in that case too:
> - dsb_chicken(): program the SAFE_WINDOW chicken bits,
> - intel_dsb_vblank_evade(): use vmin/vmax vblank starts for the
>   wait window,
> - intel_dsb_wait_for_delayed_vblank(): wait inside the vmin safe window
>   before the scanline-based delayed vblank wait.
> 
> Introduce helper pre_commit_use_safe_window() and use it in the three sites
> 
> v2: Instead of modifying pre_commit_is_vrr_active() use a new helper and
>     use it only in the required places. (Ville).
> 
> v3: -Keep using pre_commit_is_vrr_active() for DCB path. (Ville)
>     -Add a separate check for fixed RR with VRR TG and use
>      fixed mode vblank start there. (Ville)
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c | 22 ++++++++++++++++++++--
>  1 file changed, 20 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 07dd6318d9cc..d9a270362a82 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -210,6 +210,18 @@ static int dsb_scanline_to_hw(struct intel_atomic_state *state,
>  	return (scanline + vtotal - intel_crtc_scanline_offset(crtc_state)) % vtotal;
>  }
>  
> +static
> +bool pre_commit_use_safe_window(struct intel_atomic_state *state,
> +				struct intel_crtc *crtc)
> +{
> +	struct intel_display *display = to_intel_display(crtc->base.dev);
> +
> +	if (intel_vrr_always_use_vrr_tg(display))
> +		return true;
> +
> +	return pre_commit_is_vrr_active(state, crtc);
> +}
> +
>  /*
>   * Bspec suggests that we should always set DSB_SKIP_WAITS_EN. We have approach
>   * different from what is explained in Bspec on how flip is considered being
> @@ -229,7 +241,7 @@ static u32 dsb_chicken(struct intel_atomic_state *state,
>  	u32 chicken = intel_psr_use_trans_push(new_crtc_state) ?
>  		DSB_SKIP_WAITS_EN : 0;
>  
> -	if (pre_commit_is_vrr_active(state, crtc))
> +	if (pre_commit_use_safe_window(state, crtc))
>  		chicken |= DSB_CTRL_WAIT_SAFE_WINDOW |
>  			DSB_CTRL_NO_WAIT_VBLANK |
>  			DSB_INST_WAIT_SAFE_WINDOW |
> @@ -798,6 +810,12 @@ void intel_dsb_vblank_evade(struct intel_atomic_state *state,
>  		end = intel_vrr_vmax_vblank_start(crtc_state);
>  		start = end - vblank_delay - latency;
>  		intel_dsb_wait_scanline_out(state, dsb, start, end);
> +	} else if (pre_commit_use_safe_window(state, crtc)) {
> +		int vblank_delay = crtc_state->set_context_latency;
> +
> +		end = intel_mode_vblank_start(&crtc_state->hw.adjusted_mode);
> +		start = end - vblank_delay - latency;
> +		intel_dsb_wait_scanline_out(state, dsb, start, end);
>  	} else {
>  		int vblank_delay = intel_mode_vblank_delay(&crtc_state->hw.adjusted_mode);
>  
> @@ -891,7 +909,7 @@ void intel_dsb_wait_for_delayed_vblank(struct intel_atomic_state *state,
>  		&crtc_state->hw.adjusted_mode;
>  	int wait_scanlines;
>  
> -	if (pre_commit_is_vrr_active(state, crtc)) {
> +	if (pre_commit_use_safe_window(state, crtc)) {
>  		/*
>  		 * If the push happened before the vmin decision boundary
>  		 * we don't know how far we are from the undelayed vblank.
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2026-06-18 18:29 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-08 12:37 [PATCH v2 0/2] Extend VRR safe window wait for VRR TG Ankit Nautiyal
2026-06-08 12:37 ` [PATCH v2 1/2] drm/i915/dsb: shift delayed-vblank DSL wait start by one scanline Ankit Nautiyal
2026-06-16 18:02   ` Ville Syrjälä
2026-06-08 12:37 ` [PATCH v2 2/2] drm/i915/dsb: Use safe window path when VRR TG is used Ankit Nautiyal
2026-06-16 18:02   ` Ville Syrjälä
2026-06-17  4:59     ` Nautiyal, Ankit K
2026-06-17  5:14   ` [PATCH v3 " Ankit Nautiyal
2026-06-18 18:29     ` Ville Syrjälä [this message]
2026-06-08 13:44 ` ✓ CI.KUnit: success for Extend VRR safe window wait for VRR TG Patchwork
2026-06-08 18:30 ` ✓ i915.CI.BAT: success for Extend VRR safe window wait for VRR TG (rev2) Patchwork
2026-06-08 22:50 ` ✗ i915.CI.Full: failure " Patchwork
2026-06-09  8:14 ` ✓ i915.CI.Full: success " Patchwork
2026-06-17  6:38 ` ✓ CI.KUnit: " Patchwork
2026-06-17  6:46 ` ✓ i915.CI.BAT: success for Extend VRR safe window wait for VRR TG (rev3) Patchwork
2026-06-17  7:16 ` ✓ Xe.CI.BAT: success for Extend VRR safe window wait for VRR TG (rev2) Patchwork
2026-06-17 13:34 ` ✓ Xe.CI.FULL: " Patchwork
2026-06-18  2:46 ` ✓ i915.CI.Full: success for Extend VRR safe window wait for VRR TG (rev3) Patchwork

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