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Thu, 18 Jun 2026 07:48:37 -0700 (PDT) Received: from linaro.org ([2a10:d582:31e:0:b52:6a9:569d:e33e]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5ad4baab437sm1317173e87.81.2026.06.18.07.48.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Jun 2026 07:48:37 -0700 (PDT) Date: Thu, 18 Jun 2026 15:48:35 +0100 From: Jim MacArthur To: Richard Henderson Cc: qemu-devel@nongnu.org Subject: Re: [PATCH v2 3/6] target/arm/ptw.c: Add Granule Bypass Windows Message-ID: References: <20260603-jmac-gpc3b-v2-0-115c51936962@linaro.org> <20260603-jmac-gpc3b-v2-3-115c51936962@linaro.org> <7615fda1-4052-4696-b477-6eacc057c4a5@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7615fda1-4052-4696-b477-6eacc057c4a5@linaro.org> Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=jim.macarthur@linaro.org; helo=mail-lj1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, Jun 10, 2026 at 09:41:56AM -0700, Richard Henderson wrote: > On 6/3/26 11:26, Jim MacArthur wrote: > > + const uint64_t BW_STRIDE_SHIFT = 40; > ... > > + switch (bw_stride_field) { > > + case 0b00000: > > + case 0b00010: > > + case 0b00100: > > + case 0b00110: > > + case 0b00111: > > + case 0b01000: > > + case 0b01001: > > + case 0b01010: > > + case 0b10000: > > + bw_stride = 1ULL << (bw_stride_field + BW_STRIDE_SHIFT); > > BW_STRIDE_SHIFT should be 39 not 40. > > Everything else is correct. > Agree with the simplification, but BW_STRIDE_SHIFT should be 40. As per D24.2.54, a BWSTRIDE field of 0 gives a stride size of 1TB or 1<<40 bytes. (gpcbwu, the highest bit set in the mask, is indeed 39+BWSTRIDE, but the subtraction of bw_size from bw_stride has the same effect.) There was an error in a later use of bw_stride which might have made it look like something else was intended. I'll respin with the simplification suggested; thank you. Jim