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Mon, 22 Jun 2026 14:31:32 -0700 (PDT) Received: from google.com ([118.150.148.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84564ef4c09sm9525473b3a.61.2026.06.22.14.31.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jun 2026 14:31:32 -0700 (PDT) Date: Tue, 23 Jun 2026 05:31:27 +0800 From: Kuan-Wei Chiu To: Chao Liu Cc: pbonzini@redhat.com, marcandre.lureau@redhat.com, alistair.francis@wdc.com, farosas@suse.de, lvivier@redhat.com, liwei1518@gmail.com, daniel.barboza@oss.qualcomm.com, zhiwei_liu@linux.alibaba.com, jserv@ccns.ncku.edu.tw, eleanor15x@gmail.com, marscheng@google.com, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: Re: [PATCH v3 0/5] hw/riscv: Add support for Milk-V Duo board Message-ID: References: <20260616190147.1286316-1-visitorckw@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=visitorckw@gmail.com; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, Jun 17, 2026 at 02:37:34PM +0800, Chao Liu wrote: > On Tue, Jun 16, 2026 at 07:01:42PM +0800, Kuan-Wei Chiu wrote: > Hi Kuan-Wei, > > > Add initial support for the Milk-V Duo board. > > > > The Sophgo CV1800B SoC features T-Head C906 processing, standard PLIC > > and CLINT controllers, a dw8250 uart, and basic clock control. The > > current implementation can successfully run OpenSBI and boot Linux v7.0 > > from an SD card to the Linux shell. > Can you add a document for the Milk-V Duo board? Ack. Will add a doc in next version. Regards, Kuan-Wei > > Thanks, > Chao > > --- > > Changes in v3: > > - Rebase on master branch. > > - Drop custom T-Head PMU CSR patch to avoid duplication. > > - Use REG_BYTE_WIDTH macro in clock controller. > > > > Changes in v2: > > - Added link for the custom T-Head PMU CSRs > > - Added qtest to validate basic for the dw8250 and clock controller. > > - Removed RFC tag. > > > > Kuan-Wei Chiu (5): > > hw/char: Add dw8250 UART > > hw/misc: Add Sophgo CV1800B clock controller > > hw/riscv: Add Sophgo CV1800B SoC support > > hw/riscv: Add Milk-V Duo board support > > tests/qtest: Add qtest for Milk-V Duo board > > > > MAINTAINERS | 12 ++ > > configs/devices/riscv64-softmmu/default.mak | 1 + > > hw/char/Kconfig | 4 + > > hw/char/dw8250.c | 118 ++++++++++++++ > > hw/char/meson.build | 1 + > > hw/misc/Kconfig | 3 + > > hw/misc/cv1800b_clk.c | 90 +++++++++++ > > hw/misc/meson.build | 1 + > > hw/riscv/Kconfig | 14 ++ > > hw/riscv/cv1800b.c | 168 ++++++++++++++++++++ > > hw/riscv/meson.build | 3 + > > hw/riscv/milkv_duo.c | 124 +++++++++++++++ > > include/hw/char/dw8250.h | 27 ++++ > > include/hw/misc/cv1800b_clk.h | 24 +++ > > include/hw/riscv/cv1800b.h | 52 ++++++ > > tests/qtest/meson.build | 3 +- > > tests/qtest/milkv-duo-test.c | 70 ++++++++ > > 17 files changed, 714 insertions(+), 1 deletion(-) > > create mode 100644 hw/char/dw8250.c > > create mode 100644 hw/misc/cv1800b_clk.c > > create mode 100644 hw/riscv/cv1800b.c > > create mode 100644 hw/riscv/milkv_duo.c > > create mode 100644 include/hw/char/dw8250.h > > create mode 100644 include/hw/misc/cv1800b_clk.h > > create mode 100644 include/hw/riscv/cv1800b.h > > create mode 100644 tests/qtest/milkv-duo-test.c > > > > -- > > 2.54.0.1136.gdb2ca164c4-goog > >