From: Sean Christopherson <seanjc@google.com>
To: Kiryl Shutsemau <kirill@shutemov.name>
Cc: David Laight <david.laight.linux@gmail.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Thomas Gleixner <tglx@kernel.org>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
x86@kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com>,
Kai Huang <kai.huang@intel.com>,
Xiaoyao Li <xiaoyao.li@intel.com>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
Binbin Wu <binbin.wu@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>, Dan Williams <djbw@kernel.org>,
Borys Tsyrulnikov <tsyrulnikov.borys@gmail.com>,
kvm@vger.kernel.org, linux-coco@lists.linux.dev,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v5 2/3] x86/insn-eval: Add insn_assign_reg() helper
Date: Tue, 7 Jul 2026 07:46:57 -0700 [thread overview]
Message-ID: <ak0RYaft14ku6rEi@google.com> (raw)
In-Reply-To: <akaCzNRGVy5Xr-bG@thinkstation>
On Thu, Jul 02, 2026, Kiryl Shutsemau wrote:
> On Wed, Jul 01, 2026 at 06:00:33PM +0100, David Laight wrote:
> > Or be even more specific and use '& 0xffffffff' rather than a cast.
> > Particularly since the casts of the RHS in the byte/short cases aren't
> > needed at all.
>
> I'd rather keep the body exactly as KVM has it today.
+1. My main argument for casting in the 1-byte and 2-byte cases is consistency
above all else, using a mask for the 4-byte case defeats that goal.
> This is now a straight move + rename with no functional change, and the v4
> attempt to rewrite it with arithmetic is precisely what introduced the
> AH/CH/DH/BH clobber Sashiko flagged. Tidying the casts turns it back into a
> rewrite and diverges from the form KVM has shipped for years. Feel free to
> submit a separate cleanup on top if you feel strongly.
>
> Updated patch below; I'll fold it into v6.
>
> -- >8 --
> Subject: [PATCH] x86/insn-eval: Move assign_register() out of KVM as insn_assign_reg()
>
> KVM's instruction emulator has a small helper, assign_register(), that
> writes a value into a register following the x86 rules for writes to
> general-purpose registers: an 8- or 16-bit write leaves the rest of the
> register untouched, a 32-bit write zero-extends the result to 64 bits,
> and a 64-bit write replaces the whole register.
>
> The TDX guest #VE handler needs the same logic for port I/O emulation
> to get 32-bit zero-extension right. Rather than add a third copy of
> the same switch, move the helper verbatim to <asm/insn-eval.h>, rename
> it to insn_assign_reg(), and route KVM's callers through it.
>
> Add <asm/insn.h> to the header's includes so it builds standalone in
> callers that have not pulled it in transitively.
>
> No functional change.
>
> Signed-off-by: Kiryl Shutsemau (Meta) <kas@kernel.org>
> Cc: stable@vger.kernel.org # prerequisite for the following 32-bit port I/O zero-extension fix
> ---
Acked-by: Sean Christopherson <seanjc@google.com>
next prev parent reply other threads:[~2026-07-07 14:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 11:05 [PATCH v5 0/3] x86/tdx: Fix port I/O handling bugs Kiryl Shutsemau
2026-07-01 11:05 ` [PATCH v5 1/3] x86/tdx: Fix off-by-one in port I/O handling Kiryl Shutsemau
2026-07-01 11:23 ` sashiko-bot
2026-07-01 11:05 ` [PATCH v5 2/3] x86/insn-eval: Add insn_assign_reg() helper Kiryl Shutsemau
2026-07-01 14:59 ` Sean Christopherson
2026-07-01 17:00 ` David Laight
2026-07-02 15:30 ` Kiryl Shutsemau
2026-07-07 14:46 ` Sean Christopherson [this message]
2026-07-01 11:05 ` [PATCH v5 3/3] x86/tdx: Fix zero-extension for 32-bit port I/O Kiryl Shutsemau
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