Re: [PATCH] target/arm/hvf: manually sync ID_AA64ISAR0_EL1 on vCPU init

["Jason L. Wright'" <wrigjl@proton.me>]

On Tue, Jun 23, 2026 at 09:42:47AM +0100, Peter Maydell wrote:
> On Tue, 23 Jun 2026 at 09:27, Philippe Mathieu-Daudé
> <philmd@oss.qualcomm.com> wrote:
> >
> > Hi,
> >
> > On 8/6/26 18:05, Peter Maydell wrote:
> > > On Mon, 8 Jun 2026 at 16:56, Jason L. Wright' <wrigjl@proton.me> wrote:
> > >> The three methods track different requirements, so I matched
> > >> the closest existing pattern for ID_AA64ISAR0_EL1 and left
> > >> the others alone.
> > >
> > > It seems to me that you've added a third thing that's different
> > > from either of the ways that we handle existing ID registers
> > > with an isar.idregs[] field.
> > >
> > > I think we need to figure out:
> >
> > Should we revert the commit until this is figured out
> 
> I don't think it's difficult. Somebody who cares about hvf
> should just do it, and submit this patch with whatever the right
> approach is.
> 
I'll have another look at it this week. I think we can unify the
approaches, but I need to make sure I understand the other registers
better (PFR0 and MMFR0).

--Jason Wright