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Mon, 29 Jun 2026 22:18:20 +0000 (UTC) Received: from 3mdeb.com ([37.59.142.106]) by ghost-submission-7d8d68f679-ms46z with ESMTPSA id 6s/PNSvvQmo6mSwAPJZ6Kg (envelope-from ); Mon, 29 Jun 2026 22:18:20 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=ovhmo3617313-selector1 header.d=3mdeb.com header.i="@3mdeb.com" header.h=From Authentication-Results:garm.ovh; auth=pass (GARM-106R00618994954-effa-4477-99ba-52d4da84c15d, 8153FC81E90989DE28CEFA46AD98A6783E51CAAD) smtp.auth=sergii.dmytruk@3mdeb.com X-OVh-ClientIp:176.111.183.249 Date: Tue, 30 Jun 2026 01:18:11 +0300 From: Sergii Dmytruk To: Jan Beulich Cc: Andrew Cooper , Roger Pau =?iso-8859-1?Q?Monn=E9?= , xen-devel@lists.xenproject.org, trenchboot-devel@googlegroups.com Subject: Re: [PATCH v3 14/22] x86/boot: choose AP stack based on APIC ID Message-ID: References: <16a5438f73a026d4db1a5340f599d4839c74fcc6.1748611041.git.sergii.dmytruk@3mdeb.com> <1483a375-9662-48b8-8bf2-8cc83386b068@suse.com> MIME-Version: 1.0 Content-Type: text/plain; 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h=From; s=ovhmo3617313-selector1; t=1782771501; v=1; b=PmGCgehp9xYxgPpn2rUrLLDnY6bsduPA9K+iKtwZF0tYCkB1tMyv88z1FF7UOIeiHgocpYBB sZqMpWfOWrUl4QUTEmxWpBBpylkO0Nn4zML5jJaYCDYTeTuekvP+hzZL5KezWpmMiCupOiHYiiN NAzAfYiE3UfJFCcoFv02x9EF7QiQlDG2K2YXZhnBXIVI5c6ZidWRyslJbuhqXpDjN3iWVtGZzWq 6Ur+mVggpbSURcldjxopSokHjwXE8j1I+CDWpKiQqaAIWQNhTGa5EjIIB6gFYYcl/gXDt78wgqh IbBX/QY33UtYgO56qaKR+s8/5xDf//G4vl8e6xffl43Jw== X-purgate-ID: tlsNG-d25034/1782771501-92120D51-219E6CD2/0/0 X-purgate-type: clean X-purgate-size: 1665 On Thu, Jan 22, 2026 at 04:52:36PM +0100, Jan Beulich wrote: > > + /* Not x2APIC, read from MMIO */ > > + and $APIC_BASE_ADDR_MASK, %eax > > + mov APIC_ID(%eax), %esp > > + shr $24, %esp > > I have to admit that I'm rather hesitant towards seeing %esp used like this. I'll switch to %ebp to pass APIC ID. > > --- a/xen/arch/x86/boot/x86_64.S > > +++ b/xen/arch/x86/boot/x86_64.S > > @@ -15,7 +15,33 @@ ENTRY(__high_start) > > mov $XEN_MINIMAL_CR4,%rcx > > mov %rcx,%cr4 > > > > - mov stack_start(%rip),%rsp > > + test %ebx,%ebx > > + cmovz stack_start(%rip), %rsp > > + jz .L_stack_set > > + > > + /* APs only: get stack base from APIC ID saved in %esp. */ > > + mov $-1, %rax > > Here and below 32-bit insn would do fine. However, ... Are all addresses guaraneed to be below 4 GiB? > > + lea x86_cpu_to_apicid(%rip), %rcx > > +1: > > + add $1, %rax > > + cmp $NR_CPUS, %eax > > + jb 2f > > + hlt > > +2: > > + cmp %esp, (%rcx, %rax, 4) > > + jne 1b > > ... can't all of this be a simple REPNE SCASL? It can, but then can't have an upper bound, right? > As to the upper bound of NR_CPUS, do we really need to look this far? Are you suggesting to use `max_cpus` instead? > > + /* %eax is now Xen CPU index. */ > > + lea stack_base(%rip), %rcx > > + mov (%rcx, %rax, 8), %rsp > > + > > + test %rsp,%rsp > > Nit: Blank after comma please. Sure. Regards, Sergii