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From: "Luck, Tony" <tony.luck@intel.com>
To: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Cc: Borislav Petkov <bp@alien8.de>, Yi Lai <yi1.lai@intel.com>,
	<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 09/10] EDAC/igen6: Remove redundant resource configuration tables
Date: Mon, 6 Jul 2026 16:29:19 -0700	[thread overview]
Message-ID: <akw6T2ViydORzd0p@agluck-desk3> (raw)
In-Reply-To: <20260706032233.3283297-10-qiuxu.zhuo@intel.com>

On Mon, Jul 06, 2026 at 11:22:32AM +0800, Qiuxu Zhuo wrote:
> Several resource configuration tables differ only in their num_imc
> value, while all other fields are identical. Their only purpose is to
> describe the number of memory controllers supported by a platform.
> 
> Since IMC count is now detected at runtime, these duplicate tables no
> longer carry any unique platform information. Reuse the shared
> configurations and remove the redundant tables.
...
> +	{ PCI_VDEVICE(INTEL, DID_WCL_SKU1), .driver_data = (kernel_ulong_t)&mtl_p_cfg },

Sharing these is good. But also might be confusing since the structure
names include the three character short form of the CPU name.

Please add some comments before each structure definition to list
which CPU models are sharing. E.g.

/* Shared by Meteor Lake-P, Arrow Lake, Wildcat Lake. */
static struct res_config mtl_p_cfg = {
 ...
}

-Tony

  reply	other threads:[~2026-07-06 23:29 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-06  3:22 [PATCH 00/10] EDAC/{ie31200,igen6}: Fix address decoding and detect IMCs at runtime Qiuxu Zhuo
2026-07-06  3:22 ` [PATCH 01/10] EDAC/ie31200: Decouple DIMM width decoding from enum order Qiuxu Zhuo
2026-07-06  3:22 ` [PATCH 02/10] EDAC/igen6: Fix interleave boundary condition Qiuxu Zhuo
2026-07-06  3:22 ` [PATCH 03/10] EDAC/igen6: Fix channel selection hash Qiuxu Zhuo
2026-07-06  3:22 ` [PATCH 04/10] EDAC/igen6: Fix channel address decode for non-hash mode Qiuxu Zhuo
2026-07-06  3:22 ` [PATCH 05/10] EDAC/igen6: Fix Raptor Lake-P logged error address Qiuxu Zhuo
2026-07-06  3:22 ` [PATCH 06/10] EDAC/igen6: Remove unnecessary XOR on the zero-valued interleave bit Qiuxu Zhuo
2026-07-06  3:22 ` [PATCH 07/10] EDAC/igen6: Simplify compute die ID comments Qiuxu Zhuo
2026-07-06  3:22 ` [PATCH 08/10] EDAC/igen6: Detect present memory controllers at runtime Qiuxu Zhuo
2026-07-06  3:22 ` [PATCH 09/10] EDAC/igen6: Remove redundant resource configuration tables Qiuxu Zhuo
2026-07-06 23:29   ` Luck, Tony [this message]
2026-07-07  0:53     ` Zhuo, Qiuxu
2026-07-06  3:22 ` [PATCH 10/10] EDAC/igen6: Refactor address translation logic Qiuxu Zhuo

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