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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31429f9d439sm36664456eec.5.2026.07.19.20.29.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jul 2026 20:29:10 -0700 (PDT) Date: Sun, 19 Jul 2026 20:29:08 -0700 From: Qiang Yu To: Krzysztof Kozlowski Cc: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 0/3] Add QMP PCIe multiple link-mode PHY support Message-ID: References: <20260717-glymur_linkmode_0717-v5-0-4f9e87a61463@oss.qualcomm.com> <20260719-beautiful-pheasant-of-variation-61b8cd@quoll> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260719-beautiful-pheasant-of-variation-61b8cd@quoll> X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIwMDAzNSBTYWx0ZWRfX3xNTWLfqzu1I zdQOuLPoKGTH0j0TpWKN1abafSKngwVPjib8BsQAng9DyLqfbckWDjlYsloJxjSC3jstn4Irs0l c23TpTHnxFPaL34swTsE1qIosDHI+Z8= X-Proofpoint-GUID: o6Lj5FMJAZD7rLYFE6aq1QW80Tso6kxU X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIwMDAzNSBTYWx0ZWRfXwPOrWv2VcJYt gX41mx95fyu/Dp0dXfviqyPIa4IkfBy34Wl7tXRxCTNHrnJdLdgo5Fknv1VKSU5qMJQG/NZ8u9o p6xtDwMTF7hRaipau5YQ0QFdY+571gWIv9dnFyx0WNBgROMVvSZofreQ8BpEZ2Wmil/HbDuka1G 9X+aa9OI0hYKySYb+10fj7XXNznxycpLevnhSo9M1bDiiu56HrlTb5AxBcyJx1GrZCl/1aYjR4p fISVI743Y/YrZtZq2MS2n87Qvzo3mhaAsbez48ZkzVbDlf5Hd9qr7/UbYfSf8lDwPboySiCdb// /AxI0xYdD3HYQi0Sjxa4s8U4FA4KSy5psRdQq+RgikxnjmogDVotUwJTO1nG57OaS8h16dk4gQW olUoKmKBnzVemX27iqfFc+c19zRSndWQFdyHeDufglU/ilhTjYu4f6BaV3z5d+x/mLf7SPzQAsK vgLpTeWk2Ck/beonUpA== X-Authority-Analysis: v=2.4 cv=T5K8ifKQ c=1 sm=1 tr=0 ts=6a5d9608 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=P_9lKjKDqroO28rNP9YA:9 a=CjuIK1q_8ugA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-ORIG-GUID: o6Lj5FMJAZD7rLYFE6aq1QW80Tso6kxU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-19_08,2026-07-17_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 impostorscore=0 bulkscore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607200035 On Sun, Jul 19, 2026 at 08:43:43AM +0200, Krzysztof Kozlowski wrote: > On Fri, Jul 17, 2026 at 02:58:32AM -0700, Qiang Yu wrote: > > Hi all, > > > > Some QMP PCIe PHY hardware blocks can be configured through a link-mode > > register into different link topologies, such as a single wide link, or > > multiple independent narrower links (e.g. x8 or x4+x4 mode on the Glymur > > PCIe3 PHY). > > > > Earlier revisions tried to extend the existing single-instance > > phy-qcom-qmp-pcie.c driver to cover this hardware. That added a large > > amount of conditional, multi-PHY logic to a driver whose data model > > assumes one PHY per node. > > > > This series adds a dedicated PHY provider driver, > > phy-qcom-qmp-pcie-multiphy.c: > > > > A single PHY provider node describes the shared hardware block. A new > > "qcom,link-mode" property points at the TCSR syscon register that reports > > the active topology; the driver reads it once at probe. #phy-cells = <1> > > lets consumers pass a logical PHY index to obtain their sub-PHY. Match > > data is indexed by link mode, and each link mode has its own array of > > per-PHY config tables, so one shared provider exposes a different set of > > logical PHYs depending on the active mode. The driver inherits the PHY > > settings and link mode already programmed by UEFI, so only the no-CSR > > reset is used, and no PHY setting tables or related structures are > > defined. Each sub-PHY owns its register regions and power domain, so in a > > bifurcated mode the links are brought up, and powered independently. > > > > The driver is implemented and validated on Glymur, and is intended to > > be extensible to other multi-mode QMP PCIe PHYs. > > > > This series depends on a prerequisite patch by Krzysztof Kozlowski: > > https://lore.kernel.org/r/20260420133616.88740-2-krzysztof.kozlowski@oss.qualcomm.com > > There was a v2, still not applied I think: > https://lore.kernel.org/all/20260609141608.354186-2-krzysztof.kozlowski@oss.qualcomm.com/ Okay, will update the link to point to v2. - Qiang Yu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A3BEC44515 for ; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31429f9d439sm36664456eec.5.2026.07.19.20.29.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jul 2026 20:29:10 -0700 (PDT) Date: Sun, 19 Jul 2026 20:29:08 -0700 From: Qiang Yu To: Krzysztof Kozlowski Cc: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 0/3] Add QMP PCIe multiple link-mode PHY support Message-ID: References: <20260717-glymur_linkmode_0717-v5-0-4f9e87a61463@oss.qualcomm.com> <20260719-beautiful-pheasant-of-variation-61b8cd@quoll> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20260719-beautiful-pheasant-of-variation-61b8cd@quoll> X-Proofpoint-GUID: 1BcyyF4CvVIDqj6RktVtuK1jxZoYxNPg X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIwMDAzNSBTYWx0ZWRfXxLGHzsVpj/uI iyBYFLdhA/BMhLGrW/EgrzfWDpSdrU8O9cpOi+7Qn2H2SyxvYdEoq5dla9zDuKQgqweLx9rzjTp cT07U9FzJz59B7D1k3D+MMK4CcmMkPKQ9FjMmqDMYQaM3VoWo2MPKOPFZMfqR8qd6dAEIjqveCY eOFAmM5sMR34eNWwqU/LQiWxCbXtAvvLKwX1X9S/Y3b+nQVmXpSLXHzdTAg7YjePaH9KZOrowF4 GOLlY1fj/fUWfAJPl+qR38WmI1Vqn8REA2D09g1ksbXiKEfOk/921krmageDtuAjF88RvFLLFeW IhHG8GwtbQb62VVwu9Bn5nuVwF4cpL7OfEN4SPD2JkL087j9ilfTB3XIVk+E+NnKBUIUJb1bAD7 csxKxtDIVANOSwqOMMbi287D6V9U97jBRsdmh5z5flpN4UnWwT3FqqmWoyeBHZ2FifZchIFXnrC w1BaZIdHRf8XMVtg5nA== X-Proofpoint-ORIG-GUID: 1BcyyF4CvVIDqj6RktVtuK1jxZoYxNPg X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIwMDAzNSBTYWx0ZWRfX5tBhFkBsblx3 0dDA1dE3RiDOI9LrXUViBFM2D06tmPxB2k3Mn+f1LTvQeCoR2fMyL5bZdDHPYlq1S92yV5orbjl AiCVn1ctmLcduZD9KYX08q+g/8wogP0= X-Authority-Analysis: v=2.4 cv=CJQamxrD c=1 sm=1 tr=0 ts=6a5d9608 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=P_9lKjKDqroO28rNP9YA:9 a=CjuIK1q_8ugA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-19_08,2026-07-17_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 suspectscore=0 phishscore=0 priorityscore=1501 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607200035 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260719_202913_536607_03D8D71E X-CRM114-Status: GOOD ( 25.40 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Sun, Jul 19, 2026 at 08:43:43AM +0200, Krzysztof Kozlowski wrote: > On Fri, Jul 17, 2026 at 02:58:32AM -0700, Qiang Yu wrote: > > Hi all, > > > > Some QMP PCIe PHY hardware blocks can be configured through a link-mode > > register into different link topologies, such as a single wide link, or > > multiple independent narrower links (e.g. x8 or x4+x4 mode on the Glymur > > PCIe3 PHY). > > > > Earlier revisions tried to extend the existing single-instance > > phy-qcom-qmp-pcie.c driver to cover this hardware. That added a large > > amount of conditional, multi-PHY logic to a driver whose data model > > assumes one PHY per node. > > > > This series adds a dedicated PHY provider driver, > > phy-qcom-qmp-pcie-multiphy.c: > > > > A single PHY provider node describes the shared hardware block. A new > > "qcom,link-mode" property points at the TCSR syscon register that reports > > the active topology; the driver reads it once at probe. #phy-cells = <1> > > lets consumers pass a logical PHY index to obtain their sub-PHY. Match > > data is indexed by link mode, and each link mode has its own array of > > per-PHY config tables, so one shared provider exposes a different set of > > logical PHYs depending on the active mode. The driver inherits the PHY > > settings and link mode already programmed by UEFI, so only the no-CSR > > reset is used, and no PHY setting tables or related structures are > > defined. Each sub-PHY owns its register regions and power domain, so in a > > bifurcated mode the links are brought up, and powered independently. > > > > The driver is implemented and validated on Glymur, and is intended to > > be extensible to other multi-mode QMP PCIe PHYs. > > > > This series depends on a prerequisite patch by Krzysztof Kozlowski: > > https://lore.kernel.org/r/20260420133616.88740-2-krzysztof.kozlowski@oss.qualcomm.com > > There was a v2, still not applied I think: > https://lore.kernel.org/all/20260609141608.354186-2-krzysztof.kozlowski@oss.qualcomm.com/ Okay, will update the link to point to v2. - Qiang Yu -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy