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Higher value > indicates more bias towards that plane. The values are in U1.15 > format. > > $ cat /sys/kernel/debug/dri/0/gt0/ia_gt_bias > 0x80004000 (GT: 1.000, IA: 0.500) > > This interface will allow us to observe power budget changes while > running workloads and also, if needed, tune it. > > v3: Add a helper function for U1.15 decode (Michal) > v4: Validate input values (Rodrigo) > > Cc: Michal Wajdeczko > Cc: Rodrigo Vivi > Signed-off-by: Vinay Belgaumkar > --- > drivers/gpu/drm/xe/regs/xe_gt_regs.h | 4 ++ > drivers/gpu/drm/xe/xe_gt_debugfs.c | 83 +++++++++++++++++++++++++++- > 2 files changed, 86 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h > index 08251c7a1a4b..4f1404c6c209 100644 > --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h > +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h > @@ -634,6 +634,10 @@ > #define GT_GFX_RC6_LOCKED XE_REG(0x138104) > #define GT_GFX_RC6 XE_REG(0x138108) > > +#define GT_IA_PERF_BIAS_REG XE_REG(0x138158) > +#define GT_BIAS REG_GENMASK(31, 16) > +#define IA_BIAS REG_GENMASK(15, 0) > + > #define GT0_PERF_LIMIT_REASONS XE_REG(0x1381a8) > /* Common performance limit reason bits - available on all platforms */ > #define GT0_PERF_LIMIT_REASONS_MASK 0xde3 > diff --git a/drivers/gpu/drm/xe/xe_gt_debugfs.c b/drivers/gpu/drm/xe/xe_gt_debugfs.c > index c38bcacb27e4..407393a90909 100644 > --- a/drivers/gpu/drm/xe/xe_gt_debugfs.c > +++ b/drivers/gpu/drm/xe/xe_gt_debugfs.c > @@ -10,6 +10,7 @@ > #include > #include > > +#include "regs/xe_gt_regs.h" > #include "xe_device.h" > #include "xe_force_wake.h" > #include "xe_gt.h" > @@ -22,6 +23,7 @@ > #include "xe_guc_hwconfig.h" > #include "xe_hw_engine.h" > #include "xe_lrc.h" > +#include "xe_mmio.h" > #include "xe_mocs.h" > #include "xe_pat.h" > #include "xe_pm.h" > @@ -336,6 +338,83 @@ static int force_reset_sync_show(struct seq_file *s, void *unused) > } > DEFINE_SHOW_STORE_ATTRIBUTE(force_reset_sync); > > +#define U1_15_MAX 0x8000 > +#define U1_15_INT_BIT REG_BIT(15) > +#define U1_15_FRACTION_BITS REG_GENMASK(14, 0) > + > +static void decode_u1_15(u16 num, u16 *whole, u32 *frac) > +{ > + u16 frac_bits; > + > + /* > + * In U1.15 format, uppermost bit is integer value and the > + * rest 15 are the fraction. We calculate up to 3 decimal places. > + */ > + > + *whole = num & U1_15_INT_BIT ? 1 : 0; > + frac_bits = REG_FIELD_GET(U1_15_FRACTION_BITS, num); > + *frac = ((u32)frac_bits * 1000) / U1_15_MAX; > +} > + > +static int ia_gt_bias_show(struct seq_file *s, void *unused) > +{ > + struct xe_gt *gt = s->private; > + struct xe_device *xe = gt_to_xe(gt); > + u32 val; > + u32 ia_frac, gt_frac; > + u16 ia_raw, gt_raw; > + u16 ia_int, gt_int; > + > + guard(xe_pm_runtime)(xe); > + val = xe_mmio_read32(>->mmio, GT_IA_PERF_BIAS_REG); > + > + ia_raw = REG_FIELD_GET(IA_BIAS, val); > + gt_raw = REG_FIELD_GET(GT_BIAS, val); > + > + decode_u1_15(ia_raw, &ia_int, &ia_frac); > + decode_u1_15(gt_raw, >_int, >_frac); > + > + seq_printf(s, "0x%x (GT: %u.%03u, IA: %u.%03u)\n", > + val, gt_int, gt_frac, ia_int, ia_frac); > + > + return 0; > +} > + > +static bool is_valid_u1_15(u32 val) this function name seems to be misleading since it validates the entire u32... > +{ > + /* Validate both IA and GT values */ > + if (REG_FIELD_GET(IA_BIAS, val) <= U1_15_MAX && > + REG_FIELD_GET(GT_BIAS, val) <= U1_15_MAX) > + return true; > + else > + return false; just return (REG_FIELD_GET(IA_BIAS, val) <= U1_15_MAX && REG_FIELD_GET(GT_BIAS, val) <= U1_15_MAX); or perhaps just use this directly in the function below... > +} > + > +static ssize_t ia_gt_bias_write(struct file *file, > + const char __user *userbuf, > + size_t count, loff_t *ppos) > +{ > + struct seq_file *s = file->private_data; > + struct xe_gt *gt = s->private; > + struct xe_device *xe = gt_to_xe(gt); > + u32 val; > + int ret; > + > + ret = kstrtou32_from_user(userbuf, count, 0, &val); > + if (ret) > + return ret; > + > + if (!is_valid_u1_15(val)) > + return -EINVAL; > + > + guard(xe_pm_runtime)(xe); > + xe_mmio_write32(>->mmio, GT_IA_PERF_BIAS_REG, val); > + > + return count; > +} > + > +DEFINE_SHOW_STORE_ATTRIBUTE(ia_gt_bias); > + > void xe_gt_debugfs_register(struct xe_gt *gt) > { > struct xe_device *xe = gt_to_xe(gt); > @@ -368,7 +447,6 @@ void xe_gt_debugfs_register(struct xe_gt *gt) > debugfs_create_file("stats", 0600, root, gt, &stats_fops); > debugfs_create_file("force_reset", 0600, root, gt, &force_reset_fops); > debugfs_create_file("force_reset_sync", 0600, root, gt, &force_reset_sync_fops); > - > drm_debugfs_create_files(vf_safe_debugfs_list, > ARRAY_SIZE(vf_safe_debugfs_list), > root, minor); > @@ -378,6 +456,9 @@ void xe_gt_debugfs_register(struct xe_gt *gt) > ARRAY_SIZE(pf_only_debugfs_list), > root, minor); > > + if (xe_gt_is_main_type(gt) && !IS_DGFX(xe) && !IS_SRIOV_VF(xe)) > + debugfs_create_file("ia_gt_bias", 0600, root, gt, &ia_gt_bias_fops); > + > xe_uc_debugfs_register(>->uc, root); > > if (IS_SRIOV_PF(xe)) > -- > 2.38.1 >