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Mon, 20 Jul 2026 09:42:56 +0000 Received: from TYNPR02MB9351.apcprd02.prod.outlook.com ([fe80::e5f3:5fb7:3d29:5934]) by TYNPR02MB9351.apcprd02.prod.outlook.com ([fe80::e5f3:5fb7:3d29:5934%4]) with mapi id 15.21.0223.015; Mon, 20 Jul 2026 09:42:55 +0000 Date: Mon, 20 Jul 2026 17:42:50 +0800 From: Chao Liu To: Jian Cai Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, liwei1518@gmail.com, daniel.barboza@oss.qualcomm.com, zhiwei_liu@linux.alibaba.com Subject: Re: [RFC PATCH 1/3] hw/riscv: add K230 SRAM device model Message-ID: References: <20260720074545.8987-1-lingqian_gi@163.com> <20260720074545.8987-2-lingqian_gi@163.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260720074545.8987-2-lingqian_gi@163.com> X-ClientProxiedBy: SJ0PR05CA0061.namprd05.prod.outlook.com (2603:10b6:a03:332::6) To TYNPR02MB9351.apcprd02.prod.outlook.com (2603:1096:405:3d0::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TYNPR02MB9351:EE_|SE3PR02MB9612:EE_ X-MS-Office365-Filtering-Correlation-Id: c6f67b7e-3fe1-43fd-5dbb-08dee64346a1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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envelope-from=chao.liu@processmission.com; helo=OS8PR02CU002.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Jian, On Mon, Jul 20, 2026 at 03:45:43PM +0800, Jian Cai wrote: > The K230 shared SRAM (2 MB at 0x80200000) has no software-visible > controller registers: it is a pure on-chip RAM block accessed via > the AXI bus. This patch wraps it as a SysBusDevice so that it appears > in the QOM tree, supports VMState migration, and can be introspected > by management tools. > > Clock gating (CMU at 0x91100000, offset 0x5c) and reset control > (RMU at 0x91101000, offsets 0x60/0x64) are handled by separate > system-controller peripherals and are not modelled here. > > Reference: > K230 TRM V0.3.1 (2024-11-18), Section 5.2 Sram Thanks for the contribution! But I didn't receive the cover letter for this patch set. Please check if you prepared one, or if it might have been lost during transmission. Could you please include a cover letter when you send the next revision of this series? It should briefly explain what the series does as a whole and what problem it is intended to solve. Here are two ways to generate one: 1. Store the cover letter in the branch description: git branch --edit-description git format-patch --cover-letter --cover-from-description=subject \ -o outgoing 2. Generate a cover letter template and edit it manually: git format-patch --cover-letter -o k230-patches $EDITOR k230-patches/0000-cover-letter.patch In general, a single-patch submission does not need a separate cover letter. For a multi-patch series like this one, however, we prefer a cover letter that provides an overview of the whole series. > > Signed-off-by: Jian Cai > --- > MAINTAINERS | 5 +++ > hw/riscv/k230_sram.c | 81 ++++++++++++++++++++++++++++++++++++ > include/hw/riscv/k230_sram.h | 35 ++++++++++++++++ > 3 files changed, 121 insertions(+) > create mode 100644 hw/riscv/k230_sram.c > create mode 100644 include/hw/riscv/k230_sram.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index 6171cc7494..3567563ba6 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1825,6 +1825,11 @@ L: qemu-riscv@nongnu.org > S: Maintained > F: docs/system/riscv/k230.rst > F: hw/riscv/k230.c > +F: hw/riscv/k230_sram.c > +F: include/hw/riscv/k230_sram.h > +F: hw/riscv/k230_sram.c > +F: include/hw/riscv/k230_sram.h > +F: tests/qtest/k230-sram-test.c > F: hw/watchdog/k230_wdt.c > F: include/hw/riscv/k230.h > F: include/hw/watchdog/k230_wdt.h > diff --git a/hw/riscv/k230_sram.c b/hw/riscv/k230_sram.c > new file mode 100644 > index 0000000000..1d960e733e > --- /dev/null > +++ b/hw/riscv/k230_sram.c > @@ -0,0 +1,81 @@ > +/* > + * K230 SRAM Controller > + * > + * K230 Technical Reference Manual V0.3.1 (2024-11-18): > + * https://github.com/revyos/external-docs/blob/master/K230/en-us/K230_Technical_Reference_Manual_V0.3.1_20241118.pdf > + * > + * The K230 shared SRAM (2 MB at 0x80200000) has no software-visible > + * controller registers. This device wraps the SRAM as a SysBusDevice > + * so that it appears in the QOM tree, supports migration (VMState), > + * and can be introspected by management tools. > + * > + * Clock gating is controlled by the CMU at 0x91100000 (shrm_CLK_CFG, > + * offset 0x5c, bit 10: sram_aclk_enable). Reset is controlled by the > + * RMU at 0x91101000 (SRAM_RST_TIM/SRAM_RST_CTL, offsets 0x60/0x64). > + * Those peripherals are not modelled yet, so SRAM is always enabled > + * in the current QEMU implementation. > + * > + * Copyright (c) 2026 Jian Cai > + * > + * SPDX-License-Identifier: GPL-2.0-or-later > + */ We probably don't need to create a dedicated device model for SRAM. It can actually be replaced directly by using a QEMU memory region RAM. A simpler approach would be to keep this code in k230.c, perhaps in a helper function such as k230_sram_create(). Thanks, Chao > + > +#include "qemu/osdep.h" > +#include "qemu/units.h" > +#include "hw/core/sysbus.h" > +#include "migration/vmstate.h" > +#include "qapi/error.h" > +#include "hw/riscv/k230_sram.h" > + > +static void k230_sram_realize(DeviceState *dev, Error **errp) > +{ > + K230SramState *s = K230_SRAM(dev); > + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); > + > + memory_region_init_ram(&s->sram, OBJECT(dev), "k230.sram", > + 2 * MiB, &error_fatal); > + sysbus_init_mmio(sbd, &s->sram); > +} > + > +static void k230_sram_reset_hold(Object *obj, ResetType type) > +{ > + /* > + * No software-visible registers to reset. SRAM content is preserved > + * across warm reset on real hardware; a cold reset would clear it, > + * but QEMU memory_region_init_ram already zeroes the region on init. > + */ > +} > + > +static const VMStateDescription vmstate_k230_sram = { > + .name = "k230.sram", > + .version_id = 1, > + .minimum_version_id = 1, > + .fields = (const VMStateField[]) { > + VMSTATE_END_OF_LIST() > + }, > +}; > + > +static void k230_sram_class_init(ObjectClass *klass, const void *data) > +{ > + DeviceClass *dc = DEVICE_CLASS(klass); > + ResettableClass *rc = RESETTABLE_CLASS(klass); > + > + dc->realize = k230_sram_realize; > + rc->phases.hold = k230_sram_reset_hold; > + dc->vmsd = &vmstate_k230_sram; > + dc->desc = "K230 SRAM"; > +} > + > +static const TypeInfo k230_sram_info = { > + .name = TYPE_K230_SRAM, > + .parent = TYPE_SYS_BUS_DEVICE, > + .instance_size = sizeof(K230SramState), > + .class_init = k230_sram_class_init, > +}; > + > +static void k230_sram_register_type(void) > +{ > + type_register_static(&k230_sram_info); > +} > + > +type_init(k230_sram_register_type) > diff --git a/include/hw/riscv/k230_sram.h b/include/hw/riscv/k230_sram.h > new file mode 100644 > index 0000000000..6d15970ab9 > --- /dev/null > +++ b/include/hw/riscv/k230_sram.h > @@ -0,0 +1,35 @@ > +/* > + * K230 SRAM Controller > + * > + * K230 Technical Reference Manual V0.3.1 (2024-11-18): > + * https://github.com/revyos/external-docs/blob/master/K230/en-us/K230_Technical_Reference_Manual_V0.3.1_20241118.pdf > + * > + * The K230 shared SRAM (2 MB at 0x80200000) has no software-visible > + * controller registers: it is a pure on-chip RAM block accessed directly > + * via the AXI bus. Clock gating (CMU at 0x91100000, offset 0x5c) and > + * reset control (RMU at 0x91101000, offsets 0x60/0x64) are handled by > + * separate system-controller peripherals and are not modelled here yet. > + * > + * Copyright (c) 2026 Jian Cai > + * > + * SPDX-License-Identifier: GPL-2.0-or-later > + */ > + > +#ifndef K230_SRAM_H > +#define K230_SRAM_H > + > +#include "hw/core/sysbus.h" > +#include "qom/object.h" > + > +#define TYPE_K230_SRAM "riscv.k230.sram" > +OBJECT_DECLARE_SIMPLE_TYPE(K230SramState, K230_SRAM) > + > +struct K230SramState { > + /*< private >*/ > + SysBusDevice parent_obj; > + > + /*< public >*/ > + MemoryRegion sram; /* 2 MB SRAM storage */ > +}; > + > +#endif /* K230_SRAM_H */ > -- > 2.43.0 >