Re: [PATCH v6 2/3] iommu/arm-smmu-v3: Introduce CFGI/TLBI-repeat workaround infrastructure

[Nicolin Chen <nicolinc@nvidia.com>]

On Mon, Jul 13, 2026 at 11:15:41AM +0000, Ashish Mhetre wrote:
> Tegra264 SMMU instances need every CFGI/TLBI command sequence issued
> twice, with the second issue executing only after the first issue's
> CMD_SYNC has completed:
> 
>     TLBI/CFGI ... CMD_SYNC TLBI/CFGI ... CMD_SYNC
> 
> ATC_INV is not affected and must never be doubled.
> 
> Add arm_smmu_erratum_repeat_tlbi_cfgi_key and an
> arm_smmu_erratum_cmd_needs_repeating() helper that gates on the static
> key first and then range-checks the opcode (CFGI_STE .. ATC_INV), so
> subsequent changes wiring the workaround into the CMDQ submission and
> iommufd batching paths can share a single predicate.
> 
> Rename the existing arm_smmu_cmdq_issue_cmdlist() to
> __arm_smmu_cmdq_issue_cmdlist() and add a thin wrapper that re-issues
> the same cmdlist a second time when the predicate fires. Register the
> new condition with arm_smmu_cmdq_batch_force_sync() and add
> arm_vsmmu_can_batch_cmd() so iommufd batches split at every "needs
> repeating" transition.
> 
> No callers enable the static key yet, so there is no functional change.
> A subsequent change will enable the key on affected instances.

Maybe add a small note (better in patch-3).

Note: since guest-level VCMDQs issue commands directly to the HW, a guest
kernel enabling the cmdqv feature on NVIDIA Tegra264 must apply this WAR.

> Suggested-by: Nicolin Chen <nicolinc@nvidia.com>
> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>

Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>

Some small issues; please fix:

> +static bool arm_vsmmu_can_batch_cmd(struct arm_smmu_device *smmu,
> +				    struct arm_vsmmu_invalidation_cmd *last,
> +				    struct arm_vsmmu_invalidation_cmd *next)

@smmu is unused here.

> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index dd7475c50afc..eb8374cfce2a 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -42,6 +42,14 @@ MODULE_PARM_DESC(disable_msipolling,
>  static const struct iommu_ops arm_smmu_ops;
>  static struct iommu_dirty_ops arm_smmu_dirty_ops;
>  
> +/*
> + * Repeat every {CFGI,TLBI};CMD_SYNC command sequence so that the second
> + * issue executes only after the first issue's CMD_SYNC has completed.
> + * Does not apply to ATC_INV. The key is global and is enabled from DT
> + * probe on affected hardware (currently Tegra264 only).
> + */
> +static DEFINE_STATIC_KEY_FALSE(arm_smmu_erratum_repeat_tlbi_cfgi_key);

Since we defined a static key, it would be better explicitly add:

#include <linux/jump_label.h>

> @@ -860,6 +900,11 @@ static bool arm_smmu_cmdq_batch_force_sync(struct arm_smmu_device *smmu,
>  	    (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC))
>  		return true;
>  
> +	/* See the description at arm_smmu_erratum_repeat_tlbi_cfgi_key */
> +	if (cmds->num == CMDQ_BATCH_ENTRIES &&
> +	    arm_smmu_erratum_cmd_needs_repeating(&cmds->cmds[0]))
> +		return true;

	/*
	 * See the description at arm_smmu_erratum_repeat_tlbi_cfgi_key. Batches
	 * never mix CFGI/TLBI with others, so checking cmds[0] alone is enough.
	 */

Nicolin