From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: John Harrison <John.Harrison@igalia.com>
Cc: <intel-gfx@lists.freedesktop.org>,
<intel-xe@lists.freedesktop.org>, <kernel-dev@igalia.com>,
Uma Shankar <uma.shankar@intel.com>,
Animesh Manna <animesh.manna@intel.com>,
Jani Nikula <jani.nikula@linux.intel.com>
Subject: Re: [PATCH] drm/i915/display: Fix too few bits in transcoder mask variables
Date: Mon, 13 Jul 2026 18:43:04 -0400 [thread overview]
Message-ID: <alVp-CHJWlgYvL_k@intel.com> (raw)
In-Reply-To: <20260713165626.2827609-1-John.Harrison@Igalia.com>
On Mon, Jul 13, 2026 at 09:56:26AM -0700, John Harrison wrote:
> New transcoder enum values (for CMTG) were recently added which pushed
> the maximum transcoder mask beyond 8bits. The patch in question
> updated the info structure's u8 to u16 but not any of the functions
> that process transcoder masks. So fix those as well.
>
> Signed-off-by: John Harrison <John.Harrison@Igalia.com>
> Fixes: 789dda6429e0 ("drm/i915/cmtg: Add CMTG transcoder offset in struct _device_info")
Thanks for this finding. But could you please double check Sashiko?
We might have further gaps around this:
https://sashiko.dev/#/patchset/20260713165626.2827609-1-John.Harrison%40Igalia.com
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 22 ++++++++++----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 214454f419e9..38763a6802c5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3767,9 +3767,9 @@ static void enabled_joiner_pipes(struct intel_display *display,
> }
> }
>
> -static u8 hsw_panel_transcoders(struct intel_display *display)
> +static u16 hsw_panel_transcoders(struct intel_display *display)
> {
> - u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
> + u16 panel_transcoder_mask = BIT(TRANSCODER_EDP);
>
> if (DISPLAY_VER(display) >= 11)
> panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
> @@ -3777,13 +3777,13 @@ static u8 hsw_panel_transcoders(struct intel_display *display)
> return panel_transcoder_mask;
> }
>
> -static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
> +static u16 hsw_enabled_transcoders(struct intel_crtc *crtc)
> {
> struct intel_display *display = to_intel_display(crtc);
> - u8 panel_transcoder_mask = hsw_panel_transcoders(display);
> + u16 panel_transcoder_mask = hsw_panel_transcoders(display);
> enum transcoder cpu_transcoder;
> u8 primary_pipe, secondary_pipes;
> - u8 enabled_transcoders = 0;
> + u16 enabled_transcoders = 0;
>
> /*
> * XXX: Do intel_display_power_get_if_enabled before reading this (for
> @@ -3844,18 +3844,18 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
> return enabled_transcoders;
> }
>
> -static bool has_edp_transcoders(u8 enabled_transcoders)
> +static bool has_edp_transcoders(u16 enabled_transcoders)
> {
> return enabled_transcoders & BIT(TRANSCODER_EDP);
> }
>
> -static bool has_dsi_transcoders(u8 enabled_transcoders)
> +static bool has_dsi_transcoders(u16 enabled_transcoders)
> {
> return enabled_transcoders & (BIT(TRANSCODER_DSI_0) |
> BIT(TRANSCODER_DSI_1));
> }
>
> -static bool has_pipe_transcoders(u8 enabled_transcoders)
> +static bool has_pipe_transcoders(u16 enabled_transcoders)
> {
> return enabled_transcoders & ~(BIT(TRANSCODER_EDP) |
> BIT(TRANSCODER_DSI_0) |
> @@ -3863,7 +3863,7 @@ static bool has_pipe_transcoders(u8 enabled_transcoders)
> }
>
> static void assert_enabled_transcoders(struct intel_display *display,
> - u8 enabled_transcoders)
> + u16 enabled_transcoders)
> {
> /* Only one type of transcoder please */
> drm_WARN_ON(display->drm,
> @@ -5880,7 +5880,7 @@ static int intel_atomic_check_crtcs(struct intel_atomic_state *state)
> }
>
> static bool intel_cpu_transcoders_need_modeset(struct intel_atomic_state *state,
> - u8 transcoders)
> + u16 transcoders)
> {
> const struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> @@ -6516,7 +6516,7 @@ int intel_atomic_check(struct drm_device *dev,
> }
>
> if (is_trans_port_sync_mode(new_crtc_state)) {
> - u8 trans = new_crtc_state->sync_mode_slaves_mask;
> + u16 trans = new_crtc_state->sync_mode_slaves_mask;
>
> if (new_crtc_state->master_transcoder != INVALID_TRANSCODER)
> trans |= BIT(new_crtc_state->master_transcoder);
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-07-13 22:43 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 16:56 [PATCH] drm/i915/display: Fix too few bits in transcoder mask variables John Harrison
2026-07-13 17:03 ` ✓ CI.KUnit: success for " Patchwork
2026-07-13 17:43 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-13 18:28 ` ✓ i915.CI.BAT: " Patchwork
2026-07-13 20:55 ` ✓ Xe.CI.FULL: " Patchwork
2026-07-13 22:43 ` Rodrigo Vivi [this message]
2026-07-13 23:28 ` [PATCH] " John Harrison
2026-07-14 3:02 ` ✗ i915.CI.Full: failure for " Patchwork
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