From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Jamin Lin <jamin_lin@aspeedtech.com>
Cc: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>, "Eric Blake" <eblake@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Fabiano Rosas" <farosas@suse.de>,
"Laurent Vivier" <lvivier@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"Troy Lee" <troy_lee@aspeedtech.com>
Subject: Re: [PATCH v1 09/15] crypto/cipher-gcrypt: Implement AES-GCM
Date: Tue, 14 Jul 2026 09:39:46 +0100 [thread overview]
Message-ID: <alX10vA2TB_cmzxC@redhat.com> (raw)
In-Reply-To: <20260714072900.3023742-10-jamin_lin@aspeedtech.com>
On Tue, Jul 14, 2026 at 07:29:14AM +0000, Jamin Lin wrote:
> Map QCRYPTO_CIPHER_MODE_GCM to GCRY_CIPHER_MODE_GCM and advertise it in
> qcrypto_cipher_supports() for 128-bit block ciphers. Add a GCM driver
> whose setiv accepts the (typically 96-bit) nonce, whose encrypt/decrypt
> do not require block-aligned lengths, and which implements setaad via
> gcry_cipher_authenticate() and gettag via gcry_cipher_gettag().
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> crypto/cipher-gcrypt.c.inc | 101 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 101 insertions(+)
>
> diff --git a/crypto/cipher-gcrypt.c.inc b/crypto/cipher-gcrypt.c.inc
> index 12eb9ddb5a..fce09a3c77 100644
> --- a/crypto/cipher-gcrypt.c.inc
> +++ b/crypto/cipher-gcrypt.c.inc
> @@ -65,6 +65,8 @@ static int qcrypto_cipher_mode_to_gcry_mode(QCryptoCipherMode mode)
> return GCRY_CIPHER_MODE_CBC;
> case QCRYPTO_CIPHER_MODE_CTR:
> return GCRY_CIPHER_MODE_CTR;
> + case QCRYPTO_CIPHER_MODE_GCM:
> + return GCRY_CIPHER_MODE_GCM;
> default:
> return GCRY_CIPHER_MODE_NONE;
> }
> @@ -104,6 +106,10 @@ bool qcrypto_cipher_supports(QCryptoCipherAlgo alg,
> case QCRYPTO_CIPHER_MODE_XTS:
> case QCRYPTO_CIPHER_MODE_CTR:
> return true;
> + case QCRYPTO_CIPHER_MODE_GCM:
> + /* GCM requires a 128-bit block cipher. */
> + return gcry_cipher_get_algo_blklen(
> + qcrypto_cipher_alg_to_gcry_alg(alg)) == 16;
> default:
> return false;
> }
> @@ -228,6 +234,99 @@ static const struct QCryptoCipherDriver qcrypto_gcrypt_ctr_driver = {
> .cipher_free = qcrypto_gcrypt_ctx_free,
> };
>
> +/*
> + * GCM is an AEAD stream mode: the IV/nonce need not match the block size,
> + * the message length need not be a multiple of the block size, associated
> + * data is fed with gcry_cipher_authenticate() and the authentication tag is
> + * read back with gcry_cipher_gettag().
> + */
> +static int qcrypto_gcrypt_gcm_setiv(QCryptoCipher *cipher,
> + const uint8_t *iv, size_t niv,
> + Error **errp)
> +{
> + QCryptoCipherGcrypt *ctx = container_of(cipher, QCryptoCipherGcrypt, base);
> + gcry_error_t err;
> +
> + gcry_cipher_reset(ctx->handle);
> + err = gcry_cipher_setiv(ctx->handle, iv, niv);
> + if (err != 0) {
> + error_setg(errp, "Cannot set IV: %s", gcry_strerror(err));
> + return -1;
> + }
> +
> + return 0;
> +}
>
> +static int qcrypto_gcrypt_gcm_encrypt(QCryptoCipher *cipher, const void *in,
> + void *out, size_t len, Error **errp)
> +{
> + QCryptoCipherGcrypt *ctx = container_of(cipher, QCryptoCipherGcrypt, base);
> + gcry_error_t err;
> +
> + err = gcry_cipher_encrypt(ctx->handle, out, len, in, len);
> + if (err != 0) {
> + error_setg(errp, "Cannot encrypt data: %s", gcry_strerror(err));
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +static int qcrypto_gcrypt_gcm_decrypt(QCryptoCipher *cipher, const void *in,
> + void *out, size_t len, Error **errp)
> +{
> + QCryptoCipherGcrypt *ctx = container_of(cipher, QCryptoCipherGcrypt, base);
> + gcry_error_t err;
> +
> + err = gcry_cipher_decrypt(ctx->handle, out, len, in, len);
> + if (err != 0) {
> + error_setg(errp, "Cannot decrypt data: %s", gcry_strerror(err));
> + return -1;
> + }
> +
> + return 0;
> +}
Is there a reason you can't use the common qcrypto_gcrypt_setiv,
qcrypto_gcrypt_decrypt and qcrypto_gcrypt_encrypt methods ?
> +
> +static int qcrypto_gcrypt_gcm_gettag(QCryptoCipher *cipher,
> + uint8_t *tag, size_t len, Error **errp)
> +{
> + QCryptoCipherGcrypt *ctx = container_of(cipher, QCryptoCipherGcrypt, base);
> + gcry_error_t err;
> +
> + err = gcry_cipher_gettag(ctx->handle, tag, len);
> + if (err != 0) {
> + error_setg(errp, "Cannot get tag: %s", gcry_strerror(err));
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +static const struct QCryptoCipherDriver qcrypto_gcrypt_gcm_driver = {
> + .cipher_encrypt = qcrypto_gcrypt_gcm_encrypt,
> + .cipher_decrypt = qcrypto_gcrypt_gcm_decrypt,
> + .cipher_setiv = qcrypto_gcrypt_gcm_setiv,
> + .cipher_setaad = qcrypto_gcrypt_gcm_setaad,
> + .cipher_gettag = qcrypto_gcrypt_gcm_gettag,
> + .cipher_free = qcrypto_gcrypt_ctx_free,
> +};
> +
> static QCryptoCipher *qcrypto_cipher_ctx_new(QCryptoCipherAlgo alg,
> QCryptoCipherMode mode,
> const uint8_t *key,
> @@ -259,6 +358,8 @@ static QCryptoCipher *qcrypto_cipher_ctx_new(QCryptoCipherAlgo alg,
>
> if (mode == QCRYPTO_CIPHER_MODE_CTR) {
> drv = &qcrypto_gcrypt_ctr_driver;
> + } else if (mode == QCRYPTO_CIPHER_MODE_GCM) {
> + drv = &qcrypto_gcrypt_gcm_driver;
> } else {
> drv = &qcrypto_gcrypt_driver;
> }
> --
> 2.43.0
>
>
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
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next prev parent reply other threads:[~2026-07-14 8:40 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-14 7:29 [PATCH v1 00/15] Support the ASPEED HACE crypto command Jamin Lin
2026-07-14 7:29 ` [PATCH v1 01/15] hw/misc/aspeed_hace: Support the crypto command in direct access mode Jamin Lin
2026-07-14 7:29 ` [PATCH v1 02/15] tests/qtest/aspeed-hace: Test the crypto command on the AST2500 Jamin Lin
2026-07-14 7:29 ` [PATCH v1 03/15] hw/misc/aspeed_hace: Support scatter-gather mode for the crypto command Jamin Lin
2026-07-14 7:29 ` [PATCH v1 04/15] hw/misc/aspeed_hace: Support the CTR " Jamin Lin
2026-07-14 7:29 ` [PATCH v1 05/15] tests/qtest/aspeed-hace: Test the crypto command on the AST2600 Jamin Lin
2026-07-14 10:16 ` Cédric Le Goater
2026-07-14 7:29 ` [PATCH v1 06/15] tests/qtest/aspeed-hace: Test the crypto command on the AST1030 Jamin Lin
2026-07-14 7:29 ` [PATCH v1 07/15] crypto/cipher: Add GCM to QCryptoCipherMode Jamin Lin
2026-07-14 8:37 ` Daniel P. Berrangé
2026-07-14 7:29 ` [PATCH v1 08/15] crypto/cipher: Add setaad/gettag for AEAD modes Jamin Lin
2026-07-14 8:37 ` Daniel P. Berrangé
2026-07-14 7:29 ` [PATCH v1 09/15] crypto/cipher-gcrypt: Implement AES-GCM Jamin Lin
2026-07-14 8:39 ` Daniel P. Berrangé [this message]
2026-07-14 8:57 ` Jamin Lin
2026-07-14 9:31 ` Daniel P. Berrangé
2026-07-14 7:29 ` [PATCH v1 10/15] tests/unit/test-crypto-cipher: Test AES-GCM mode Jamin Lin
2026-07-14 7:29 ` [PATCH v1 11/15] hw/misc/aspeed_hace: Support 64-bit DMA for the crypto command Jamin Lin
2026-07-14 7:29 ` [PATCH v1 12/15] hw/misc/aspeed_hace: Support the AES-GCM mode " Jamin Lin
2026-07-14 7:29 ` [PATCH v1 13/15] hw/misc/aspeed_hace: Enable the crypto command on the AST2700 Jamin Lin
2026-07-14 7:29 ` [PATCH v1 14/15] tests/qtest/aspeed-hace: Test " Jamin Lin
2026-07-14 7:29 ` [PATCH v1 15/15] tests/functional/aarch64/test_aspeed_ast2700: Drop the AST2700 crypto self-test workaround Jamin Lin
2026-07-14 8:47 ` [PATCH v1 00/15] Support the ASPEED HACE crypto command Daniel P. Berrangé
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