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[34.124.129.10]) by smtp.gmail.com with ESMTPSA id 71dfb90a1353d-5bface91766sm6434972e0c.10.2026.07.14.06.00.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jul 2026 06:00:43 -0700 (PDT) Date: Tue, 14 Jul 2026 13:00:36 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: Nicolin Chen , Will Deacon , Kevin Tian , Lu Baolu , Robin Murphy , joro@8bytes.org, David Woodhouse , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/5] iommu/arm-smmu-v3-iommufd: Reject unsupported bits in invalidation commands Message-ID: References: <194fec44b30b7b4233d218686cd76d63208932ff.1783539724.git.nicolinc@nvidia.com> <20260714121451.GJ674038@nvidia.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260714121451.GJ674038@nvidia.com> On Tue, Jul 14, 2026 at 09:14:51AM -0300, Jason Gunthorpe wrote: > On Tue, Jul 14, 2026 at 09:35:25AM +0000, Pranjal Shrivastava wrote: > > > + u8 ttl = FIELD_GET(CMDQ_TLBI_1_TTL, cmd->cmd.data[1]); > > > + u8 tg = FIELD_GET(CMDQ_TLBI_1_TG, cmd->cmd.data[1]); > > > + > > > + /* NUM, SCALE and TTL are RES0 when TG == 0 */ > > > + if (!tg) > > > + return (range || ttl) ? -EIO : 0; > > > + /* TTL == 0b01 with a 16KB TG requires SMMU_IDR5.DS */ > > > + if (tg == 2 && ttl == 1 && !(smmu->features & ARM_SMMU_FEAT_DS)) > > > > I agree we must check this but I'm a little confused, How is a user / > > VMM depending on the IDR5.DS bit today? The IDR5 is exposed to the user > > via hw_info AND in the uAPI documentation block we explicitly mention > > for struct iommu_hw_info_arm_smmuv3 the following valid fields for IDR5: > > > > idr[5]: VAX, GRAN64K, GRAN16K, GRAN4K > > Probably soon we will add DS to that comment and it will be fully > backwards compatible so a new VMM following the new guidance can just > read DS. > > Thus we can't have any kernel release that doesn't work with a VMM > following DS... > Ack. Understood. Praan