Re: [RFC PATCH 2/2] KVM: arm64: Support BBM level 3

[Oliver Upton <oupton@kernel.org>]

Hi Mostafa,

On Fri, Jul 17, 2026 at 01:09:00PM +0000, Mostafa Saleh wrote:
> If the system supports hardware Break-Before-Make (BBM) level 3, use it
> to replace stage-2 PTEs directly instead of falling back to the software
> break-before-make sequence.
> 
> 1) Get a reference count on the containing table for the new PTE.
> 2) Atomically update the PTE with the new valid descriptor.
> 3) Invalidate the TLB for the old PTE.
> 4) Drop the reference count holding the old PTE.
> 
> One interesting case, as BBML3 will update the PTE atomically, it
> can only know it raced with another core at the point of the cmpxchg
> failing, unlike the SW implementation which locks the PTE first.
> And as we must issue CMOs to the new mapped page before the update,
> that means with BBML3 racing cores will issue redundant CMOs,

I'd rather we just predicate BBML3-style transformations on an
implementation having FEAT_S2FWB and DIC. You can definitely come along
later and enable it when using a stage-2 in an SMMU makes this
mandatory, possibly at the expense of some extra CMOs.

There's also an extremely subtle detail that BBML3 enablement relies on,
which is that KVM will never change the OA of active translation. IOW,
if the host is moving the PFN we expect an invalidation before
re-mapping it.

I have no issue with relying on that behavior but we should make that
assumption abundantly clear.

One of the things on my wish list for a while has been rebuilding
hugepages after dirty logging is disabled on a memslot. That seems like
like a very good optimization to do when BBML3 is present.

> to improve this:
> - We only use BBML3 if the old PTE was live.
> - To reduce the window of the race, an early check is added before
>   the CMO to exit early, but that does not eliminate the race.
> 
> Signed-off-by: Mostafa Saleh <smostafa@google.com>
> ---
>  arch/arm64/kvm/hyp/pgtable.c | 53 +++++++++++++++++++++++++++++++-----
>  1 file changed, 46 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> index 127b7f9541b1..69d52308236f 100644
> --- a/arch/arm64/kvm/hyp/pgtable.c
> +++ b/arch/arm64/kvm/hyp/pgtable.c
> @@ -838,7 +838,8 @@ static void stage2_clean_old_pte(const struct kvm_pgtable_visit_ctx *ctx,
>  /**
>   * stage2_try_break_pte() - Invalidates a pte according to the
>   *			    'break-before-make' requirements of the
> - *			    architecture.
> + *			    architecture, if BMML3 is supported it
> + *			    will be used, otherwise fallback to SW.
>   *
>   * @ctx: context of the visited pte.
>   * @mmu: stage-2 mmu
> @@ -854,6 +855,18 @@ static bool stage2_try_break_pte(const struct kvm_pgtable_visit_ctx *ctx,
>  {
>  	kvm_pte_t locked_pte;
>  
> +	if (system_supports_bbml3() && kvm_pte_valid(ctx->old)) {
> +		kvm_pte_t curr_pte = READ_ONCE(*ctx->ptep);
> +
> +		/*
> +		 * All handled in stage2_make_pte(). However exit early if we already
> +		 * lost the race to avoid extra CMOs.
> +		 */
> +		 if (curr_pte != ctx->old)
> +			return false;

Does this race detection actually move the needle? We haven't gotten
very far from the read in __kvm_pgtable_visit().

Thanks,
Oliver