From: Chao Liu <chao.liu@processmission.com>
To: Molly Chen <xiaoou@iscas.ac.cn>
Cc: palmer@dabbelt.com, alistair.francis@wdc.com,
liwei1518@gmail.com, daniel.barboza@oss.qualcomm.com,
zhiwei_liu@linux.alibaba.com, chao.liu.zevorn@gmail.com,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH v2 18/18] target/riscv: Remove Zbkb dependency from P extension to align with the spec
Date: Mon, 3 Aug 2026 10:26:35 +0800 [thread overview]
Message-ID: <am_8SpKAh78-bKBy@ChaodeMacBook-Pro.local> (raw)
In-Reply-To: <c2c9fd17d043449e94d6a63206696d50e1f4a257.1784280142.git.xiaoou@iscas.ac.cn>
On Fri, Jul 17, 2026 at 10:07:11AM +0800, Molly Chen wrote:
> Signed-off-by: Molly Chen <xiaoou@iscas.ac.cn>
Reviewed-by: Chao Liu <chao.liu@processmission.com>
Thanks,
Chao
> ---
> target/riscv/tcg/insn_trans/trans_rvb.c.inc | 4 +++-
> target/riscv/tcg/insn_trans/trans_rvp.c.inc | 2 +-
> target/riscv/tcg/tcg-cpu.c | 6 ++----
> 3 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/target/riscv/tcg/insn_trans/trans_rvb.c.inc b/target/riscv/tcg/insn_trans/trans_rvb.c.inc
> index e4dcc7c9913..af53eb4fe4b 100644
> --- a/target/riscv/tcg/insn_trans/trans_rvb.c.inc
> +++ b/target/riscv/tcg/insn_trans/trans_rvb.c.inc
> @@ -527,7 +527,9 @@ static bool trans_brev8(DisasContext *ctx, arg_brev8 *a)
>
> static bool trans_pack(DisasContext *ctx, arg_pack *a)
> {
> - REQUIRE_ZBKB(ctx);
> + if (!has_ext(ctx, RVP) && !ctx->cfg_ptr->ext_zbkb) {
> + return false;
> + }
> return gen_arith(ctx, a, EXT_NONE, gen_pack, NULL);
> }
>
> diff --git a/target/riscv/tcg/insn_trans/trans_rvp.c.inc b/target/riscv/tcg/insn_trans/trans_rvp.c.inc
> index e33e0ec110a..8c5b52ca970 100644
> --- a/target/riscv/tcg/insn_trans/trans_rvp.c.inc
> +++ b/target/riscv/tcg/insn_trans/trans_rvp.c.inc
> @@ -1386,4 +1386,4 @@ GEN_DWS_REG_OP(psll_dws, gen_shift, EXT_NONE, tcg_gen_shl_tl)
> GEN_DWS_REG_OP(psrl_dws, gen_shift, EXT_ZERO, tcg_gen_shr_tl)
> GEN_DWS_REG_OP(psra_dws, gen_shift, EXT_SIGN, tcg_gen_sar_tl)
>
> -GEN_DW_PAIR_ARITH(ppaire_dh, REQUIRE_ZBKB(ctx); , EXT_NONE, gen_pack)
> +GEN_DW_PAIR_ARITH(ppaire_dh, , EXT_NONE, gen_pack)
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index 1665583accf..36b0196a626 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -563,10 +563,8 @@ static void riscv_cpu_validate_p(RISCVCPU *cpu, Error **errp)
> return;
> }
>
> - if (!(cpu->cfg.ext_zmmul && cpu->cfg.ext_zba && cpu->cfg.ext_zbb &&
> - cpu->cfg.ext_zbkb)) {
> - error_setg(errp, "P extension requires zmmul, zba, zbb and zbkb "
> - "extensions");
> + if (!(cpu->cfg.ext_zmmul && cpu->cfg.ext_zba && cpu->cfg.ext_zbb)) {
> + error_setg(errp, "P extension requires zmmul, zba and zbb extensions");
> return;
> }
> }
> --
> 2.34.1
>
next prev parent reply other threads:[~2026-08-03 2:26 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-17 10:06 [PATCH v2 00/18] target/riscv: Add support for RISC-V P Molly Chen
2026-07-17 10:06 ` [PATCH v2 01/18] target/riscv: Add packed SIMD extension state Molly Chen
2026-07-26 19:32 ` Daniel Henrique Barboza
2026-07-27 6:13 ` Nutty.Liu
2026-07-29 8:43 ` Chao Liu
2026-07-17 10:06 ` [PATCH v2 02/18] target/riscv: Add packed SIMD helper framework Molly Chen
2026-07-26 19:53 ` Daniel Henrique Barboza
2026-07-27 6:16 ` Nutty.Liu
2026-07-29 9:01 ` Chao Liu
2026-07-17 10:06 ` [PATCH v2 03/18] target/riscv: Add packed SIMD arithmetic instructions Molly Chen
2026-07-26 22:05 ` Daniel Henrique Barboza
2026-07-29 6:17 ` Nutty.Liu
2026-07-29 9:27 ` Chao Liu
2026-07-17 10:06 ` [PATCH v2 04/18] target/riscv: Add packed SIMD averaging and rounding instructions Molly Chen
2026-07-27 18:58 ` Daniel Henrique Barboza
2026-07-17 10:06 ` [PATCH v2 05/18] target/riscv: Add packed SIMD absolute, difference, compare and mask instructions Molly Chen
2026-07-17 10:06 ` [PATCH v2 06/18] target/riscv: Add packed SIMD shift instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 07/18] target/riscv: Add packed SIMD exchange instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 08/18] target/riscv: Add packed SIMD horizontal reduction instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 09/18] target/riscv: Add packed SIMD pack, merge and count-leading instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 10/18] target/riscv: Add packed SIMD multiplication instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 11/18] target/riscv: Add packed SIMD multiply-accumulate instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 12/18] target/riscv: Add packed SIMD Q-format multiplication instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 13/18] target/riscv: Add packed SIMD Q-format MAC instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 14/18] target/riscv: Add packed SIMD two-way " Molly Chen
2026-07-17 10:07 ` [PATCH v2 15/18] target/riscv: Add packed SIMD four-way " Molly Chen
2026-07-17 10:07 ` [PATCH v2 16/18] target/riscv: Add packed SIMD load-replicate instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 17/18] target/riscv: Add packed SIMD RV32 only instructions Molly Chen
2026-07-17 10:07 ` [PATCH v2 18/18] target/riscv: Remove Zbkb dependency from P extension to align with the spec Molly Chen
2026-08-03 2:26 ` Chao Liu [this message]
2026-07-29 8:43 ` [PATCH v2 00/18] target/riscv: Add support for RISC-V P Chao Liu
2026-07-29 9:32 ` Chao Liu
2026-08-05 18:36 ` Daniel Henrique Barboza
2026-08-11 7:54 ` MOLLY CHEN
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