From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C83BC3630B3; Mon, 27 Jul 2026 15:39:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785166746; cv=none; b=MzsaO92dPMXYqIZWFmYNVM3lwvojAIcT+AC41grenC85CnMxqQ74AFAcvEvDJ6B1Pk2BTTxXCJD5u/BNtqXpHMwr6r3qrO+XRE8RYdD5qimCtpWZ2LbqH5LEjfBs/hy0MRhfSjspZTc8mt9mk7w5UjomJzi/zF0zar9OBC4j8aI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785166746; c=relaxed/simple; bh=wpJgqhcFvrYTsrki8km4NMxs/2UDvsJc1eVE8fgdLbk=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Xu2OfNfZnHwBLDKrQl/3Xp7qXACHCBayaMVx+72wr/UJYmGHdk8ga45lYZOcqiGPQ5ze3yATUcxrYx5+fpziGtSXOPsHMg0qHDnx4/8qjsaqnSFpbDmJxe4c+2UVbOqld3L67IqC3ylTgbYjQuTn4ipLVZk/hviqstYUGA4P+sw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VIuydFFk; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VIuydFFk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D67ED1F000E9; Mon, 27 Jul 2026 15:39:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1785166745; bh=OiklzXx8p5bBY0lwFSAP/eLHXWDp5ZhVdI0sClUc26c=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=VIuydFFkDbR7M6wzVg7E2NhUc4eI1TG9hrt9IcyouTAx+xh4che7OJQvgPQP0FBdt rMfdAlEIRhluCTFT4SyRj6/szrxO73m+BayZtLpJkicU6sY4U2gNma1fWvOCFW+7fI BDvoTb1H3ohwFfrMZerEWqOD7s7lO9upZXECHZWgGaqo220Sz89ZAikEMAjB3Siezz 8eaMU7HXu6Sjc5MJTflRVMGO4AY7hbbJWEtg8rYIGmB2HzlQvKB0RF+Ugd/6Y+IHDv pkoPl5r0KpdQVr/QSDi4sBV+IWUgCw2a0jNAiq/GjUGCDY5rj23fvRvmha5f+YZRuR Cd+VAJW+x0ScA== Date: Mon, 27 Jul 2026 17:39:02 +0200 From: Thierry Reding To: Bjorn Helgaas Cc: Bjorn Helgaas , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , Pali =?utf-8?B?Um9ow6Fy?= , Michal Simek , Kevin Xie , Aksh Garg , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thierry Reding , Manikanta Maddireddy Subject: Re: [PATCH v8 4/6] PCI: tegra: Add Tegra264 support Message-ID: References: <20260716-tegra264-pcie-v8-4-23e51589229b@nvidia.com> <20260722164442.GA742885@bhelgaas> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="zk2gh5hl3rqyqvvg" Content-Disposition: inline In-Reply-To: <20260722164442.GA742885@bhelgaas> --zk2gh5hl3rqyqvvg Content-Type: text/plain; protected-headers=v1; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Subject: Re: [PATCH v8 4/6] PCI: tegra: Add Tegra264 support MIME-Version: 1.0 On Wed, Jul 22, 2026 at 11:44:42AM -0500, Bjorn Helgaas wrote: > On Thu, Jul 16, 2026 at 07:07:15PM +0200, Thierry Reding wrote: > > From: Thierry Reding > >=20 > > Add a driver for the PCIe controller found on NVIDIA Tegra264 SoCs. The > > driver is very small, with its main purpose being to set up the address > > translation registers and then creating a standard PCI host using ECAM. > > ... >=20 > > + * The various memory regions used by the controller (I/O, memory, ECA= M) are > > + * set up during early boot and have hardware-level protections in pla= ce. If > > + * the DT ranges don't match what's been setup, the controller won't b= e able > > + * to write the address endpoints properly, so make sure to validate t= hat DT > > + * and firmware programming agree on these ranges. > > + */ > > +static bool tegra264_pcie_check_ranges(struct platform_device *pdev) >=20 > Drive-by comment: I have a bit of an aversion to boolean functions > named "check" because "check" is not a predicate with a true/false or > yes/no answer. >=20 > "true" usually means success, which is the opposite of functions that > return 0 for success. >=20 > In this case, it looks like "if (tegra264_pcie_check_ranges())" means > the DT ranges match the hardware configuration. If it were named > "tegra264_pcie_valid_ranges()" or similar, an "if" test like that > would read better. Indeed, "valid ranges" is superior in this case. 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