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[174.91.117.74]) by smtp.gmail.com with ESMTPSA id a1e0cc1a2514c-97774c8f725sm7526928241.5.2026.07.28.07.34.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jul 2026 07:34:10 -0700 (PDT) Date: Tue, 28 Jul 2026 10:34:08 -0400 From: Peter Xu To: Gavin Shan Cc: Peter Maydell , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, qemu-devel@nongnu.org, mst@redhat.com, richard.henderson@linaro.org, alex@shazbot.org, berrange@redhat.com, philmd@mailo.com, david@kernel.org, clg@redhat.com, pbonzini@redhat.com, phrdina@redhat.com, jugraham@redhat.com, liugang24219@sangfor.com.cn, dinghui@sangfor.com.cn, shan.gavin@gmail.com Subject: Re: [PATCH v4 2/3] system/memory: Use qemu_ram_move() for directly accessible regions Message-ID: References: <20260727032649.145381-1-gshan@redhat.com> <20260727032649.145381-3-gshan@redhat.com> <0a384d67-fc56-4a21-9d0e-25f218a45228@redhat.com> <13333e56-3725-4550-849c-9035f6925213@oss.qualcomm.com> <2322668a-20a3-4a6b-8d7f-c04ddfef84f1@redhat.com> MIME-Version: 1.0 In-Reply-To: <2322668a-20a3-4a6b-8d7f-c04ddfef84f1@redhat.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: 47TBbE8JNvWRLj1eIhFNPYbtOqKb5t7ut0Q14M1gCFc_1785249252 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=peterx@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -36 X-Spam_score: -3.7 X-Spam_bar: --- X-Spam_report: (-3.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.58, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Tue, Jul 28, 2026 at 08:23:48PM +1000, Gavin Shan wrote: > On 7/28/26 7:35 PM, Peter Maydell wrote: > > On Tue, 28 Jul 2026 at 10:22, Philippe Mathieu-Daudé > > wrote: > > > > > > On 28/7/26 11:01, Peter Maydell wrote: > > > > On Tue, 28 Jul 2026 at 04:01, Gavin Shan wrote: > > > > > > > > > > On 7/27/26 10:51 PM, Peter Maydell wrote: > > > > > > > > > > > + test = (uintptr_t)src | (uintptr_t)dst | n; > > > > > > > + len = test & -test; > > > > > > > > > > > > What is this doing? I am not a fan of clever bit twiddling > > > > > > that isn't commented to explain itself. Readers of the code > > > > > > shouldn't have to go off and search for an explanation of what > > > > > > is going on. > > > > > > > > > > > > > > > > The following comments will be added for (v5). > > > > > > > > > > /* > > > > > * Maximal length of aligned access that are determined by @src, > > > > > * @dst and @n > > > > > */ > > > > > > > > What I mean is more that it ought to say why "x & -x" > > > > achieves that goal. > > > > > > Hmm isn't "x & -x" restricted to power of 2? Here we have no garanty > > > @test is, because we have no garanty @n is. Ah, this is catched by > > > the 'len != n' check and returns after calling memmove(). Indeed not > > > very clear notation. Again: > > > > > > ... > > > > > > /* Overlapping buffers, unaligned or oversized access */ > > > if (!QEMU_IS_ALIGNED((uintptr_t)src | (uintptr_t)dst, n)) { > > > memmove(dst, src, n); > > > return; > > > } > > > > > > switch (n) { > > > ... > > > > I'm not inherently against the bit twiddling (QEMU_IS_ALIGNED > > on a variable length will do a division, maybe we care?); > > I just want that if we do use a bit-twiddling trick that we > > explain why it does the thing we want it to do. I think the bit ops should be more efficient. I plan to queue v5 with a fixup, v5 here: https://lore.kernel.org/qemu-devel/20260728031731.286666-1-gshan@redhat.com/ Fixup: diff --git a/system/physmem.c b/system/physmem.c index fbe7df2391..2f37cbeb07 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3162,13 +3162,18 @@ void qemu_ram_move(void *dst, const void *src, size_t n) { uintptr_t test, len; - if (src == dst || n == 0) { + if (n == 0) { return; } /* - * Maximal length of aligned access that are determined by @src, - * @dst and @n + * Calculate "the lowest set bit" over @src, @dst and @n, result put + * into @len (which guarantees a power-of-two). With that and the + * later check (len!=n), it makes sure that we will only do the atomic + * ops when: + * + * (1) @n is a power-of-two + * (2) @src and @dst addresses are both aligned to @n */ test = (uintptr_t)src | (uintptr_t)dst | n; len = test & -test; Does it look ok to all of you? Thanks, -- Peter Xu