From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2520437842 for ; Thu, 30 Jul 2026 13:28:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785418123; cv=none; b=LllzbIF6aWnRcYrMFFWSflqWCeGCOmBVe0AOu6hXLh5TqTdeNx4woL1dfgV2hur33bdHaaBC7YUKzU5JFEo0rlvctr+/y3HMl6W9vG5AYBqRfYPTOlsg2uH26p/H4qJa+ZCUGDZJpa67gz6vPOHK/ZX829WwiPuB+ndce641VAY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785418123; c=relaxed/simple; bh=5susFPP2iDBVUA1+M8W95ieGpwjinw9EDzzmmaP7mCk=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=bIji/Fob42hrznD9SrTkoYc9LjDKvpKSJpBvZOX5mIzMDNXqf5K73mfWDd/zYuk4AKy1fVEzYWKWqzkXmVBb7H4ZDefMfUC/9e1gJdFducHZf3ILfhpKJIjyLFB3p+ZUIA7S5T1laOE8Zw7Ww21a5b8/gBkPj5n6AKGxzS68ZwY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bAA4WLtd; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bAA4WLtd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2AEAB1F00A3A; Thu, 30 Jul 2026 13:28:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1785418120; bh=Q+gU1+gg52G6V+eGnaJT4YJMDCIyR5riZFDBsXDACOw=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=bAA4WLtduYipz5xnYZFwBxP3yH/vfKuaXJCgsu/BM6aHaP4HFS7u6lyk7Uo8lI2s7 MBTdlO+LXu7BncWvmGpL5lbfIs9Ch0MlhaWGzTuKXrMl3nWcw8r/qUwKZ0uQ9o7BqJ VYLi6VMTN/+q4qf5NzXIRg989i3+c3EvyjJGpiKflIQYAwPz8h/zdJ7XPx4SXNxcvs 1PxBk+fADNhVvNOyMKI/GxcMGRS9wjJ+wUDhSq48EPJENqt+R3sf8G41vZsuR/UuUJ RVsrLbF8koa/Dp/jjXmWUg9nfWhdBx+Gyiy1V4iOEdXIyfL0NJXD/SbCnTa6O/XtOO vDIKX7hj22XGw== Date: Thu, 30 Jul 2026 07:28:38 -0600 From: Keith Busch To: Thomas Gleixner Cc: santhosh kumar , linux-kernel@vger.kernel.org, Christoph Hellwig , Ming Lei , x86@kernel.org Subject: Re: [RFC] PCI_IRQ_AFFINITY limits MSI-X allocation on 384 CPU / 1000+ NVMe system Message-ID: References: <87cxw6hgli.ffs@fw13> <87ldasfwht.ffs@fw13> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87ldasfwht.ffs@fw13> On Thu, Jul 30, 2026 at 03:16:46PM +0200, Thomas Gleixner wrote: > As I told you before it's simple math and resource exhaustion due to the > way how NVME is implemented and the x86 vector space limitations. > > If you want that to behave differently, then you have to talk to the > NVME people as I told you before. We can introduce a module parameter to throttle down the maximum number of IO queues to allocate per controller. I don't think the driver can automatically reason out what the correct number should be because it doesn't know how many devices it's going to see.