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From: Brian Masney <bmasney@redhat.com>
To: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Chun-Jie Chen <chun-jie.chen@mediatek.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Edward-JW Yang <edward-jw.yang@mediatek.com>,
	Richard Cochran <richardcochran@gmail.com>,
	Chen-Yu Tsai <wenst@chromium.org>,
	kernel@collabora.com, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, netdev@vger.kernel.org,
	Conor Dooley <conor.dooley@microchip.com>,
	Irving-CH Lin <irving-ch.lin@mediatek.com>
Subject: Re: [PATCH v5 00/25] MT8189: Add support for system and base clock controllers
Date: Mon, 3 Aug 2026 11:23:40 -0400	[thread overview]
Message-ID: <anCyfAxujzRS3wf2@redhat.com> (raw)
In-Reply-To: <20260801-mt8189-clocks-system-base-v5-0-ac4410697cc2@collabora.com>

On Sat, Aug 01, 2026 at 01:20:46PM +0200, Louis-Alexis Eyraud wrote:
>  .../bindings/clock/mediatek,mt8186-clock.yaml      |  128 ++-
>  .../bindings/clock/mediatek,mt8186-fhctl.yaml      |    1 +
>  .../bindings/clock/mediatek,mt8186-sys-clock.yaml  |   24 +-
>  .../bindings/clock/mediatek,mt8188-clock.yaml      |   93 --
>  .../bindings/clock/mediatek,mt8188-sys-clock.yaml  |   58 --
>  .../bindings/clock/mediatek,mt8192-clock.yaml      |  191 ----
>  .../bindings/clock/mediatek,mt8192-sys-clock.yaml  |   68 --
>  .../bindings/clock/mediatek,mt8195-clock.yaml      |  238 -----
>  .../bindings/clock/mediatek,mt8195-sys-clock.yaml  |   76 --
>  drivers/clk/mediatek/Kconfig                       |   79 ++
>  drivers/clk/mediatek/Makefile                      |    8 +
>  drivers/clk/mediatek/clk-mt8189-apmixedsys.c       |  203 ++++
>  drivers/clk/mediatek/clk-mt8189-bus.c              |  200 ++++
>  drivers/clk/mediatek/clk-mt8189-dbgao.c            |   98 ++
>  drivers/clk/mediatek/clk-mt8189-dvfsrc.c           |   58 ++
>  drivers/clk/mediatek/clk-mt8189-iic.c              |  122 +++
>  drivers/clk/mediatek/clk-mt8189-scp.c              |   77 ++
>  drivers/clk/mediatek/clk-mt8189-topckgen.c         | 1025 ++++++++++++++++++++
>  drivers/clk/mediatek/clk-mt8189-ufs.c              |  133 +++
>  drivers/clk/mediatek/clk-mt8189-vlpcfg.c           |  116 +++
>  drivers/clk/mediatek/clk-mt8189-vlpckgen.c         |  285 ++++++
>  drivers/clk/mediatek/clk-mt8196-apmixedsys.c       |    2 +-
>  drivers/clk/mediatek/clk-mt8196-vlpckgen.c         |    2 +-
>  drivers/clk/mediatek/clk-pll.c                     |  130 ++-
>  drivers/clk/mediatek/clk-pll.h                     |   13 +-
>  drivers/clk/mediatek/clk-pllfh.c                   |   15 +-
>  drivers/clk/mediatek/clk-pllfh.h                   |    3 +
>  include/dt-bindings/clock/mediatek,mt8189-clk.h    |  433 +++++++++
>  include/dt-bindings/reset/mediatek,mt8189-resets.h |   17 +
>  29 files changed, 3136 insertions(+), 760 deletions(-)

I went through the rest of the series and didn't see anything new in the
last half dozen or so patches beyond some deprecated headers.

Just for completeness: There's still the maintainer issue that I brought up
in v4 that needs to be addressed. I saw the message from Angelo about
responding to that in mid September.

Brian


  parent reply	other threads:[~2026-08-03 15:23 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-01 11:20 [PATCH v5 00/25] MT8189: Add support for system and base clock controllers Louis-Alexis Eyraud
2026-08-01 11:20 ` [PATCH v5 01/25] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8186 Louis-Alexis Eyraud
2026-08-01 11:20 ` [PATCH v5 02/25] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8192 Louis-Alexis Eyraud
2026-08-01 11:20 ` [PATCH v5 03/25] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195 Louis-Alexis Eyraud
2026-08-01 11:20 ` [PATCH v5 04/25] dt-bindings: clock: mediatek: reorder MT8186 compatibles Louis-Alexis Eyraud
2026-08-01 11:20 ` [PATCH v5 05/25] dt-bindings: clock: mediatek: regroup MT8188 dt-bindings into MT8186 Louis-Alexis Eyraud
2026-08-02 11:22   ` sashiko-bot
2026-08-03 14:24     ` Rob Herring
2026-08-01 11:20 ` [PATCH v5 06/25] dt-bindings: clock: mediatek: regroup MT8192 " Louis-Alexis Eyraud
2026-08-02 11:22   ` sashiko-bot
2026-08-01 11:20 ` [PATCH v5 07/25] dt-bindings: clock: mediatek: regroup MT8195 " Louis-Alexis Eyraud
2026-08-01 11:20 ` [PATCH v5 08/25] dt-bindings: clock: mediatek: Add MT8189 system/base clocks and resets Louis-Alexis Eyraud
2026-08-02 11:22   ` sashiko-bot
2026-08-01 11:20 ` [PATCH v5 09/25] clk: mediatek: Harmonize mtk_pll_fenc related symbol names Louis-Alexis Eyraud
2026-08-03 14:32   ` Brian Masney
2026-08-01 11:20 ` [PATCH v5 10/25] clk: mediatek: pll: Add BAR reset register offsets Louis-Alexis Eyraud
2026-08-02 11:22   ` sashiko-bot
2026-08-03 14:37   ` Brian Masney
2026-08-01 11:20 ` [PATCH v5 11/25] clk: mediatek: pll: Factorise pll power on/off sequences Louis-Alexis Eyraud
2026-08-03 14:39   ` Brian Masney
2026-08-01 11:20 ` [PATCH v5 12/25] clk: mediatek: pll: Add PLL stabilization delay definition Louis-Alexis Eyraud
2026-08-03 14:40   ` Brian Masney
2026-08-01 11:20 ` [PATCH v5 13/25] clk: mediatek: pll: Add ops for PLLs using set/clr regs Louis-Alexis Eyraud
2026-08-02 11:22   ` sashiko-bot
2026-08-03 14:44   ` Brian Masney
2026-08-01 11:21 ` [PATCH v5 14/25] clk: mediatek: pllfh: Add configurable clock ops to mtk_pllfh_data Louis-Alexis Eyraud
2026-08-03 14:45   ` Brian Masney
2026-08-01 11:21 ` [PATCH v5 15/25] clk: mediatek: pllfh: Add ops for PLLs using set/clr regs Louis-Alexis Eyraud
2026-08-03 14:46   ` Brian Masney
2026-08-01 11:21 ` [PATCH v5 16/25] clk: mediatek: Add MT8189 apmixedsys clock support Louis-Alexis Eyraud
2026-08-02 11:22   ` sashiko-bot
2026-08-03 15:12   ` Brian Masney
2026-08-01 11:21 ` [PATCH v5 17/25] clk: mediatek: Add MT8189 topckgen " Louis-Alexis Eyraud
2026-08-02 11:22   ` sashiko-bot
2026-08-03 15:16   ` Brian Masney
2026-08-01 11:21 ` [PATCH v5 18/25] clk: mediatek: Add MT8189 vlpckgen " Louis-Alexis Eyraud
2026-08-03 15:17   ` Brian Masney
2026-08-01 11:21 ` [PATCH v5 19/25] clk: mediatek: Add MT8189 vlpcfg " Louis-Alexis Eyraud
2026-08-03 15:19   ` Brian Masney
2026-08-01 11:21 ` [PATCH v5 20/25] clk: mediatek: Add MT8189 bus " Louis-Alexis Eyraud
2026-08-01 11:21 ` [PATCH v5 21/25] clk: mediatek: Add MT8189 dbgao " Louis-Alexis Eyraud
2026-08-01 11:21 ` [PATCH v5 22/25] clk: mediatek: Add MT8189 dvfsrc " Louis-Alexis Eyraud
2026-08-01 11:21 ` [PATCH v5 23/25] clk: mediatek: Add MT8189 i2c " Louis-Alexis Eyraud
2026-08-01 11:21 ` [PATCH v5 24/25] clk: mediatek: Add MT8189 scp " Louis-Alexis Eyraud
2026-08-02 11:22   ` sashiko-bot
2026-08-01 11:21 ` [PATCH v5 25/25] clk: mediatek: Add MT8189 ufs " Louis-Alexis Eyraud
2026-08-02 11:22   ` sashiko-bot
2026-08-03 15:23 ` Brian Masney [this message]
2026-08-03 19:51 ` [PATCH v5 00/25] MT8189: Add support for system and base clock controllers Jakub Kicinski

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