From: Anisa Su <anisa.su887@gmail.com>
To: Alison Schofield <alison.schofield@intel.com>
Cc: Anisa Su <anisa.su887@gmail.com>,
sashiko-reviews@lists.linux.dev, nvdimm@lists.linux.dev,
linux-cxl@vger.kernel.org
Subject: Re: [PATCH v12 6/8] cxl/mem: Configure dynamic capacity interrupts
Date: Fri, 7 Aug 2026 08:27:27 +0900 [thread overview]
Message-ID: <anUYX0t32y37vfyR@cxlqual> (raw)
In-Reply-To: <anExYCOu1n0RnYvh@aschofie-mobl2.lan>
On Mon, Aug 03, 2026 at 05:25:04PM -0700, Alison Schofield wrote:
> On Sat, Aug 01, 2026 at 02:30:24AM -0700, Anisa Su wrote:
> > On Fri, Jul 31, 2026 at 09:04:43AM +0000, sashiko-bot@kernel.org wrote:
> > > Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
> > >
> > > New issues:
> > > - [High] Infinite IRQ Thread Loop / CPU Spin when handling DCD events
> > >
> > False Positive. DCD events are ignored because DCD is turned off
> > (mds->dcd_supported = false).
>
> Hi Anisa,
>
> I have related review feedback -
>
>
> snip
>
> > >
> > > [Severity: High]
> > > Since mask now includes CXLDEV_EVENT_STATUS_DCD, status can have this bit set.
> > > However, cxl_mem_get_event_records() does not appear to handle the DCD event:
> > >
> > The mask never includes CXLDEV_EVENT_STATUS_DCD.
> > Above in cxl_event_drain_mask:
> >
> > if (cxl_dcd_supported(mds))
> > mask |= CXLDEV_EVENT_STATUS_DCD;
> >
> > mds->dcd_supported is set to false in Patch 1 so the DCD bit is never
> > set.
> >
> > So status &= mask becomes zero and we break from the loop.
> >
> > - Anisa
>
> I understand that dcd_supported being forced false makes this unreachable
> today. My concern is that this patch adds the DCD bit to the drain path
> before there is code to consume and clear that log.
>
> As soon as a later patch enables dcd_supported, the bit can enter status
> and the handler can loop without clearing it. Could the DCD bit be added
> to the mask in the same patch that adds the DCD drain handling?
>
> -- Alison
Sure, that makes sense.
cxl_event_drain_mask() no longer sets the DCD bit, and it
loses the mds argument it needed for checking cxl_dcd_supported() to set it:
/* Event logs the driver drains: standard logs when native_cxl */
static u32 cxl_event_drain_mask(struct pci_host_bridge *host_bridge)
{
if (host_bridge->native_cxl_error)
return CXLDEV_EVENT_STATUS_ALL & ~CXLDEV_EVENT_STATUS_DCD;
return 0;
}
The bit is added back by "cxl/mem: Set up framework for handling DC
Events", the patch that adds the DCD case to
cxl_mem_get_event_records(), so the mask and its consumer arrive
together.
The commit message is updated to make it clear that the DCD event log
is not drained in this patch:
The DCD event log is not drained here. cxl_event_drain_mask() reports
only the logs the driver can service, and the DCD bit is added by
the patch introducing DCD event handling. Until then a DCD interrupt
wakes the event thread, which finds no log it owns and returns.
Thanks,
Anisa
next prev parent reply other threads:[~2026-08-06 23:27 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-31 8:48 [PATCH v12 0/8] DCD Prep Series Anisa Su
2026-07-31 8:48 ` [PATCH v12 1/8] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD) Anisa Su
2026-08-03 18:03 ` Dave Jiang
2026-08-03 21:30 ` Alison Schofield
2026-08-03 23:12 ` Jonathan Cameron
2026-08-04 15:45 ` Gregory Price
2026-08-04 15:45 ` Gregory Price
2026-08-04 18:10 ` Anisa Su
2026-08-04 16:55 ` Alison Schofield
2026-08-04 18:13 ` Anisa Su
2026-07-31 8:48 ` [PATCH v12 2/8] cxl/mem: Read dynamic capacity configuration from the device Anisa Su
2026-07-31 9:01 ` sashiko-bot
2026-08-04 20:30 ` Anisa Su
2026-08-03 14:33 ` Richard Cheng
2026-08-03 22:11 ` Anisa Su
2026-08-03 21:52 ` Alison Schofield
2026-08-04 9:12 ` Anisa Su
2026-08-04 16:00 ` Gregory Price
2026-08-21 18:55 ` Alison Schofield
2026-08-03 23:55 ` Jonathan Cameron
2026-08-04 9:54 ` Anisa Su
2026-07-31 8:48 ` [PATCH v12 3/8] cxl/cdat: Gather DSMAS data for DCD partitions Anisa Su
2026-07-31 9:02 ` sashiko-bot
2026-08-04 0:07 ` Jonathan Cameron
2026-08-05 8:30 ` Anisa Su
2026-08-03 22:56 ` Alison Schofield
2026-08-05 6:58 ` Anisa Su
2026-07-31 8:48 ` [PATCH v12 4/8] cxl/events: Split event msgnum configuration from irq setup Anisa Su
2026-08-03 23:01 ` Alison Schofield
2026-07-31 8:48 ` [PATCH v12 5/8] cxl/pci: Factor out interrupt policy check Anisa Su
2026-08-03 23:55 ` Alison Schofield
2026-08-06 12:27 ` Anisa Su
2026-07-31 8:48 ` [PATCH v12 6/8] cxl/mem: Configure dynamic capacity interrupts Anisa Su
2026-07-31 9:04 ` sashiko-bot
2026-08-01 9:30 ` Anisa Su
2026-08-04 0:25 ` Alison Schofield
2026-08-06 23:27 ` Anisa Su [this message]
2026-08-04 0:13 ` Jonathan Cameron
2026-08-04 0:34 ` Alison Schofield
2026-08-06 22:11 ` Anisa Su
2026-07-31 8:48 ` [PATCH v12 7/8] cxl/core: Return endpoint decoder information from region search Anisa Su
2026-07-31 9:01 ` sashiko-bot
2026-08-04 1:02 ` Alison Schofield
2026-07-31 8:48 ` [PATCH v12 8/8] cxl/core: Enforce partition order/simplify partition calls Anisa Su
2026-08-04 0:16 ` Jonathan Cameron
2026-08-04 1:37 ` Alison Schofield
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