From: Brian Norris <briannorris@chromium.org>
To: Sean Rhodes <sean@starlabs.systems>
Cc: chrome-platform@lists.linux.dev, corentin.chary@gmail.com,
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Subject: Re: [PATCH v12 4/4] firmware: coreboot: Add CFR firmware attributes driver
Date: Tue, 11 Aug 2026 11:50:07 -0700 [thread overview]
Message-ID: <antu3wHFDzxMXBKd@google.com> (raw)
In-Reply-To: <CABtds-2qyH84oOG_JhXN6eNQOV9H9vhQvSG4JCv5E+r9VdwKcw@mail.gmail.com>
On Thu, Aug 06, 2026 at 01:28:39PM -0700, Sean Rhodes wrote:
> coreboot can publish a CFR tree in its coreboot table to describe
> firmware setup options. Add a firmware-attributes driver for that table
> entry under the coreboot firmware driver directory.
...
Kind of a large driver, but in a partial pass, nothing jumps out as too
scary to me.
> diff --git a/drivers/firmware/coreboot/coreboot-cfr.c
> b/drivers/firmware/coreboot/coreboot-cfr.c
> new file mode 100644
> index 000000000000..54aae1442bcc
> --- /dev/null
> +++ b/drivers/firmware/coreboot/coreboot-cfr.c
> @@ -0,0 +1,1208 @@
...
> +static int coreboot_cfr_apply_runtime(struct coreboot_cfr_setting *setting)
> +{
> +#ifdef CONFIG_X86
What's X86-specific in here? Are you just needing inb()/outb()? That
seems like you could 'depend on HAS_IOPORT', or #ifdef
CONFIG_HAS_IOPORT.
> + u8 status;
> +
> + if (setting->runtime_apply_method != CFR_RUNTIME_APPLY_APM_CNT)
> + return -EOPNOTSUPP;
> +
> + outb((u8)setting->runtime_apply_id, COREBOOT_CFR_APM_STS_PORT);
> + outb(COREBOOT_CFR_APM_APPLY_CMD, COREBOOT_CFR_APM_CNT_PORT);
> + status = inb(COREBOOT_CFR_APM_STS_PORT);
> + if (status)
> + return -EIO;
> +
> + return 0;
> +#else
> + return -EOPNOTSUPP;
> +#endif
> +}
> +
Brian
prev parent reply other threads:[~2026-08-11 18:50 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-06 20:28 [PATCH v12 4/4] firmware: coreboot: Add CFR firmware attributes driver Sean Rhodes
2026-08-11 18:50 ` Brian Norris [this message]
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