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ea264ef3-2b96-4569-33de-08df035e1176 X-MS-Exchange-CrossTenant-AuthSource: IA0PR11MB7752.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Aug 2026 10:37:46.7243 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: uTGly+jL4ILMN38YZXr6Wj9W2j0UJ/1gH1EcsFDAO350H3xDmgYMf051o5Tda8kaMx1O0fu2Q+bNQnlckqVnXw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPF74831EF4B X-OriginatorOrg: intel.com X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Tue, Aug 25, 2026 at 10:28:28AM -0700, Anoop, Vijay wrote: > From: Anoop Vijay > > The mailbox PHASE bit in SYSCTRL_MB_CTRL is toggled per-message and > was tracked in software as sc->phase_bit, reset to 0 on error paths. > If the cached value ever drifts from what the hardware last saw, all > following messages carry the wrong phase and get silently misread by > firmware. > > Drop the cache and read PHASE directly from SYSCTRL_MB_CTRL before > each frame instead, removing xe_sysctrl_mailbox_init() and its call > sites along with it. > Fixes: 1f95f618182b ("drm/xe/xe_sysctrl: Add System Controller mailbox communication support") Reviewed-by: Rodrigo Vivi and pushing soon > Signed-off-by: Anoop Vijay > --- > drivers/gpu/drm/xe/xe_sysctrl.c | 7 +------ > drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 22 ++++------------------ > drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 1 - > drivers/gpu/drm/xe/xe_sysctrl_types.h | 3 --- > 4 files changed, 5 insertions(+), 28 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_sysctrl.c b/drivers/gpu/drm/xe/xe_sysctrl.c > index 1db20be8158b..62ccc9be71b4 100644 > --- a/drivers/gpu/drm/xe/xe_sysctrl.c > +++ b/drivers/gpu/drm/xe/xe_sysctrl.c > @@ -85,7 +85,6 @@ int xe_sysctrl_init(struct xe_device *xe) > return ret; > > xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX); > - xe_sysctrl_mailbox_init(sc); > INIT_WORK(&sc->work, xe_sysctrl_work); > > return devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe); > @@ -114,12 +113,10 @@ void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl) > * @xe: xe device instance > * > * Invoked during system resume (S3/S4 to S0) and runtime resume from D3cold. > - * Restores SoC remapper configuration and reinitializes mailbox interface. > + * Restores SoC remapper configuration. > */ > void xe_sysctrl_pm_resume(struct xe_device *xe) > { > - struct xe_sysctrl *sc = &xe->sc; > - > if (!xe->info.has_soc_remapper_sysctrl) > return; > > @@ -127,6 +124,4 @@ void xe_sysctrl_pm_resume(struct xe_device *xe) > return; > > xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX); > - > - xe_sysctrl_mailbox_init(sc); > } > diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c > index e13eebaac1d0..72baf1aa4b3a 100644 > --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c > +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c > @@ -145,6 +145,7 @@ static int sysctrl_send_frames(struct xe_sysctrl *sc, > struct xe_device *xe = sc_to_xe(sc); > u32 ctrl_reg, total_frames, frame; > size_t bytes_sent, frame_size; > + bool phase; > > total_frames = DIV_ROUND_UP(cmd_size, XE_SYSCTRL_MB_FRAME_SIZE); > > @@ -153,7 +154,8 @@ static int sysctrl_send_frames(struct xe_sysctrl *sc, > return -EBUSY; > } > > - sc->phase_bit ^= 1; > + ctrl_reg = xe_mmio_read32(sc->mmio, SYSCTRL_MB_CTRL); > + phase = !(ctrl_reg & SYSCTRL_FRAME_PHASE); > bytes_sent = 0; > > for (frame = 0; frame < total_frames; frame++) { > @@ -161,7 +163,6 @@ static int sysctrl_send_frames(struct xe_sysctrl *sc, > > if (sysctrl_write_frame(sc, mbox_cmd + bytes_sent, frame_size)) { > xe_err(xe, "sysctrl: Failed to write frame %u\n", frame); > - sc->phase_bit = 0; > return -EIO; > } > > @@ -169,13 +170,12 @@ static int sysctrl_send_frames(struct xe_sysctrl *sc, > REG_FIELD_PREP(SYSCTRL_FRAME_CURRENT_MASK, frame) | > REG_FIELD_PREP(SYSCTRL_FRAME_TOTAL_MASK, total_frames - 1) | > SYSCTRL_MB_CTRL_CMD | > - (sc->phase_bit ? SYSCTRL_FRAME_PHASE : 0); > + (phase ? SYSCTRL_FRAME_PHASE : 0); > > xe_mmio_write32(sc->mmio, SYSCTRL_MB_CTRL, ctrl_reg); > > if (!sysctrl_wait_bit_clear(sc, SYSCTRL_MB_CTRL_RUN_BUSY, timeout_ms)) { > xe_err(xe, "sysctrl: Frame %u acknowledgment timeout\n", frame); > - sc->phase_bit = 0; > return -ETIMEDOUT; > } > > @@ -321,20 +321,6 @@ void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 gr > command->data_out_len = response_len; > } > > -/** > - * xe_sysctrl_mailbox_init - Initialize System Controller mailbox interface > - * @sc: System controller structure > - * > - * Initialize system controller mailbox interface for communication. > - */ > -void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc) > -{ > - u32 ctrl_reg; > - > - ctrl_reg = xe_mmio_read32(sc->mmio, SYSCTRL_MB_CTRL); > - sc->phase_bit = (ctrl_reg & SYSCTRL_FRAME_PHASE) ? 1 : 0; > -} > - > /** > * xe_sysctrl_send_command() - Send mailbox command to System Controller > * @sc: System Controller instance > diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h > index fb434cc165b2..f0d5e3d7f5e3 100644 > --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h > +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h > @@ -26,7 +26,6 @@ struct xe_sysctrl_mailbox_command; > void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id, > void *request, size_t request_len, void *response, > size_t response_len); > -void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc); > int xe_sysctrl_send_command(struct xe_sysctrl *sc, > struct xe_sysctrl_mailbox_command *cmd, > size_t *rdata_len); > diff --git a/drivers/gpu/drm/xe/xe_sysctrl_types.h b/drivers/gpu/drm/xe/xe_sysctrl_types.h > index 66ba24f43017..98c2f473f7c6 100644 > --- a/drivers/gpu/drm/xe/xe_sysctrl_types.h > +++ b/drivers/gpu/drm/xe/xe_sysctrl_types.h > @@ -26,9 +26,6 @@ struct xe_sysctrl { > /** @cmd_lock: Mutex protecting mailbox command operations */ > struct mutex cmd_lock; > > - /** @phase_bit: Message boundary phase toggle bit (0 or 1) */ > - bool phase_bit; > - > /** @work: Pending events worker */ > struct work_struct work; > > -- > 2.43.0 >