Re: [PATCH v2] dmaengine: sprd: use clk_bulk API to fix clock imbalance

[Frank Li <Frank.li@oss.nxp.com>]

On Sun, Aug 16, 2026 at 05:50:05AM +0000, Chaithanya Lagisetty wrote:
> sprd_dma_enable() enabled sdev->clk and then the optional ashb_clk. If
> enabling ashb_clk failed, sdev->clk was left enabled: both callers
> (probe and resume) treat a non-zero return as "nothing was enabled" and
> bail out, leaking sdev->clk.
>
> Convert the driver to the clk_bulk API. clk_bulk_prepare_enable()
> enables all clocks and unwinds them on failure, and
> clk_bulk_disable_unprepare() disables them, which fixes the imbalance
> and simplifies the enable/disable paths. The optional ashb_eb clock is
> fetched with devm_clk_get_optional(), so a missing clock becomes a NULL
> entry that the bulk helpers treat as a no-op.
>
> Fixes: 9b3b8171f7f4 ("dmaengine: sprd: Add Spreadtrum DMA driver")
> Signed-off-by: Chaithanya Lagisetty <nagachaithanya9911@gmail.com>
> ---
> Changes since v1:
> - Convert the enable/disable paths to the clk_bulk API instead of
>   manually disabling sdev->clk on the ashb_clk failure path, and fetch
>   the optional ashb_eb clock with devm_clk_get_optional() (Frank Li).
>
> v1: https://lore.kernel.org/dmaengine/20260813105354.2577040-1-nagachaithanya9911@gmail.com/
>
>  drivers/dma/sprd-dma.c | 44 +++++++++++++-----------------------------
>  1 file changed, 13 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c
> index 087fea3af2e4..ac6fe6118ad1 100644
> --- a/drivers/dma/sprd-dma.c
> +++ b/drivers/dma/sprd-dma.c
> @@ -208,8 +208,7 @@ struct sprd_dma_chn {
>  struct sprd_dma_dev {
>  	struct dma_device	dma_dev;
>  	void __iomem		*glb_base;
> -	struct clk		*clk;
> -	struct clk		*ashb_clk;
> +	struct clk_bulk_data	clks[2];
>  	int			irq;
>  	u32			total_chns;
>  	struct sprd_dma_chn	channels[] __counted_by(total_chns);
> @@ -260,31 +259,12 @@ static void sprd_dma_chn_update(struct sprd_dma_chn *schan, u32 reg,
>
>  static int sprd_dma_enable(struct sprd_dma_dev *sdev)
>  {
> -	int ret;
> -
> -	ret = clk_prepare_enable(sdev->clk);
> -	if (ret)
> -		return ret;
> -
> -	/*
> -	 * The ashb_clk is optional and only for AGCP DMA controller, so we
> -	 * need add one condition to check if the ashb_clk need enable.
> -	 */
> -	if (!IS_ERR(sdev->ashb_clk))
> -		ret = clk_prepare_enable(sdev->ashb_clk);
> -
> -	return ret;
> +	return clk_bulk_prepare_enable(ARRAY_SIZE(sdev->clks), sdev->clks);
>  }
>
>  static void sprd_dma_disable(struct sprd_dma_dev *sdev)
>  {
> -	clk_disable_unprepare(sdev->clk);
> -
> -	/*
> -	 * Need to check if we need disable the optional ashb_clk for AGCP DMA.
> -	 */
> -	if (!IS_ERR(sdev->ashb_clk))
> -		clk_disable_unprepare(sdev->ashb_clk);
> +	clk_bulk_disable_unprepare(ARRAY_SIZE(sdev->clks), sdev->clks);
>  }
>
>  static void sprd_dma_set_uid(struct sprd_dma_chn *schan)
> @@ -1140,16 +1120,18 @@ static int sprd_dma_probe(struct platform_device *pdev)
>  	if (!sdev)
>  		return -ENOMEM;
>
> -	sdev->clk = devm_clk_get(&pdev->dev, "enable");
> -	if (IS_ERR(sdev->clk)) {
> -		dev_err(&pdev->dev, "get enable clock failed\n");
> -		return PTR_ERR(sdev->clk);
> -	}
> +	sdev->clks[0].id = "enable";
> +	sdev->clks[0].clk = devm_clk_get(&pdev->dev, "enable");
> +	if (IS_ERR(sdev->clks[0].clk))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(sdev->clks[0].clk),
> +				     "get enable clock failed\n");
>
>  	/* ashb clock is optional for AGCP DMA */
> -	sdev->ashb_clk = devm_clk_get(&pdev->dev, "ashb_eb");
> -	if (IS_ERR(sdev->ashb_clk))
> -		dev_warn(&pdev->dev, "no optional ashb eb clock\n");
> +	sdev->clks[1].id = "ashb_eb";
> +	sdev->clks[1].clk = devm_clk_get_optional(&pdev->dev, "ashb_eb");
> +	if (IS_ERR(sdev->clks[1].clk))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(sdev->clks[1].clk),
> +				     "get ashb_eb clock failed\n");

sdev->clks[0].id = "enable";
sdev->clks[1].id = "ashb_eb";
ret = devm_clk_bulk_get_optional(dev, ARRAY_SIZE(sdev->clks), sdev->clks);
if (ret && !sdev->clks[0].clk)
	return sdev->clks[0].clk();

Frank

>
>  	/*
>  	 * We have three DMA controllers: AP DMA, AON DMA and AGCP DMA. For AGCP
> --
> 2.43.0
>