From: Leonardo Bras <leo.bras@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Leonardo Bras <leo.bras@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Shuah Khan <shuah@kernel.org>, Fuad Tabba <tabba@google.com>,
Oliver Upton <oupton@kernel.org>,
Peter Maydell <peter.maydell@linaro.org>,
Yao Yuan <yaoyuan@linux.alibaba.com>,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v19 04/14] KVM: arm64: Ensure GCS memory effects are visible
Date: Wed, 19 Aug 2026 18:23:11 +0100 [thread overview]
Message-ID: <aoXmfz5pPwRYRKTO@LeoBrasDK> (raw)
In-Reply-To: <20260812-arm64-gcs-v19-4-9105afd828ac@kernel.org>
On Wed, Aug 12, 2026 at 08:12:03PM +0100, Mark Brown wrote:
> In order to allow efficient implementation of GCS implementations are
> permitted to do GCS specific caching, with barriers implicit in stack
> switch operations
(GCSSS2)
> and GCSB DSYNC as an explicit barrier. Since we do
> not use GCS in the hypervisor or host kernel the hypervisor cannot rely
> on any barriers being present in vCPU context switches other than those
> it explicitly inserts. Add explicit barriers when loading and saving
> vCPU state.
>
The same way we have a DSB, having a GCSB here seems required, as there may
be pending GCS writes. Makes sense.
Question:
You state that we do _not_ use GCS in the hypervisor, nor in the host.
I understand that we GCSB() when we exit the vcpu context, but why would we
need to GCSB() before getting back in?
If cpus will GCSB() on guest_exit, and host/hyp does not use GCS, there
should be no GCS pending operation at the entry point.
Am I missing something?
Thanks!
Leo
next prev parent reply other threads:[~2026-08-19 17:23 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-12 19:11 [PATCH v19 00/14] KVM: arm64: Provide guest support for GCS Mark Brown
2026-08-12 19:12 ` [PATCH v19 01/14] arm64/gcs: Ensure FGTs for EL1 GCS instructions are disabled Mark Brown
2026-08-19 13:41 ` Leonardo Bras
2026-08-19 14:21 ` Mark Brown
2026-08-19 16:41 ` Leonardo Bras
2026-08-12 19:12 ` [PATCH v19 02/14] KVM: arm64: Fix FGT mapping for HFGITR_EL2.nGCSEPP Mark Brown
2026-08-19 13:55 ` Leonardo Bras
2026-08-19 16:42 ` Leonardo Bras
2026-08-12 19:12 ` [PATCH v19 03/14] KVM: arm64: Manage GCS access and registers for guests Mark Brown
2026-08-12 19:44 ` sashiko-bot
2026-08-19 16:32 ` Leonardo Bras
2026-08-19 16:46 ` Mark Brown
2026-08-12 19:12 ` [PATCH v19 04/14] KVM: arm64: Ensure GCS memory effects are visible Mark Brown
2026-08-19 17:23 ` Leonardo Bras [this message]
2026-08-19 18:08 ` Mark Brown
2026-08-12 19:12 ` [PATCH v19 05/14] KVM: arm64: Set PSTATE.EXLOCK when entering an exception Mark Brown
2026-08-12 19:33 ` sashiko-bot
2026-08-12 19:12 ` [PATCH v19 06/14] KVM: arm64: Validate GCS exception lock when emulating ERET Mark Brown
2026-08-12 19:12 ` [PATCH v19 07/14] KVM: arm64: Forward GCS exceptions to nested guests Mark Brown
2026-08-12 19:32 ` sashiko-bot
2026-08-12 19:12 ` [PATCH v19 08/14] KVM: arm64: Enforce EXLOCK for SPSR and ELR Mark Brown
2026-08-12 19:12 ` [PATCH v19 09/14] KVM: arm64: Allow GCS to be enabled for guests Mark Brown
2026-08-12 19:12 ` [PATCH v19 10/14] KVM: selftests: arm64: Add GCS registers to get-reg-list Mark Brown
2026-08-12 19:30 ` sashiko-bot
2026-08-12 19:12 ` [PATCH v19 11/14] KVM: selftests: arm64: Add GCS to set_id_regs Mark Brown
2026-08-12 19:12 ` [PATCH v19 12/14] KVM: selftests: arm64: Only restore SPSR_EL1 and ELR_EL1 if they change Mark Brown
2026-08-12 19:12 ` [PATCH v19 13/14] tools: Synchronise the kernel esr.h Mark Brown
2026-08-12 19:37 ` sashiko-bot
2026-08-12 19:12 ` [PATCH v19 14/14] KVM: selftests: arm64: Add GCS EXLOCK exception emulation test Mark Brown
2026-08-12 19:37 ` sashiko-bot
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