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Fri, 21 Aug 2026 08:14:29 -0700 (PDT) Received: from linaro.org ([2a10:d582:31e:0:fa47:b339:78a1:d4c6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-499b916a250sm31102825e9.15.2026.08.21.08.14.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Aug 2026 08:14:29 -0700 (PDT) Date: Fri, 21 Aug 2026 16:14:27 +0100 From: Jim MacArthur To: Tao Tang Cc: Eric Auger , Peter Maydell , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Chen Baozi , Pierrick Bouvier , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , Mostafa Saleh , Chao Liu Subject: Re: [RFC v5 09/28] hw/arm/smmu: Add PTE NS/NSTable helpers Message-ID: References: <20260813161515.2788900-1-tangtao1634@phytium.com.cn> <20260813162446.2806393-4-tangtao1634@phytium.com.cn> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260813162446.2806393-4-tangtao1634@phytium.com.cn> Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=jim.macarthur@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Fri, Aug 14, 2026 at 12:24:45AM +0800, Tao Tang wrote: > Add helper macros for NS and NSTable bits and group PTE attribute > accessors for clarity. No functional change beyond the new helpers. > > Signed-off-by: Tao Tang > Reviewed-by: Pierrick Bouvier > --- > hw/arm/smmu-internal.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/hw/arm/smmu-internal.h b/hw/arm/smmu-internal.h > index d143d296f34..004abd58bca 100644 > --- a/hw/arm/smmu-internal.h > +++ b/hw/arm/smmu-internal.h > @@ -58,16 +58,27 @@ > ((level == 3) && \ > ((pte & ARM_LPAE_PTE_TYPE_MASK) == ARM_LPAE_L3_PTE_TYPE_PAGE)) > > +/* Stage 1 attribute fields in VMSAv8-64 Block and Page descriptors */ > +/* Non-secure bit */ > +#define PTE_NS(pte) \ > + (extract64(pte, 5, 1)) > + > /* access permissions */ > > #define PTE_AP(pte) \ > (extract64(pte, 6, 2)) > > +/* Stage 1 VMSAv8-64 Table descriptor fields */ > #define PTE_APTABLE(pte) \ > (extract64(pte, 61, 2)) > > +#define PTE_NSTABLE(pte) \ > + (extract64(pte, 63, 1)) > + > +/* Access flag: defined for both Block/Page and Table descriptors. */ > #define PTE_AF(pte) \ > (extract64(pte, 10, 1)) > + > /* > * TODO: At the moment all transactions are considered as privileged (EL1) > * as IOMMU translation callback does not pass user/priv attributes. > -- > 2.34.1 > Reviewed-by: Jim MacArthur