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[34.142.210.164]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8520f03b065sm1758681b3a.32.2026.08.24.03.07.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Aug 2026 03:07:33 -0700 (PDT) Date: Mon, 24 Aug 2026 10:07:27 +0000 From: Pranjal Shrivastava To: Vasant Hegde Cc: iommu@lists.linux.dev, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Joerg Roedel , Suravee Suthikulpanit , Ankit Soni , Jason Gunthorpe , Bjorn Helgaas , Samiullah Khawaja Subject: Re: [PATCH v2 1/5] iommu/amd: Refactor device probe and capability initialization Message-ID: References: <20260814015647.3370124-1-praan@google.com> <20260814015647.3370124-2-praan@google.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Sat, Aug 22, 2026 at 06:34:42PM +0530, Vasant Hegde wrote: > Pranjal, > > > On 8/14/2026 7:26 AM, Pranjal Shrivastava wrote: > > Restructure the device probe path to improve readability and prepare for > > cleaner error handling. Refactor check_device() into iommu_lookup_device > > to explicitly validate and return the amd_iommu ptr & devid. Refactor > > iommu_init_device() to return the allocated dev_data. Consolidate all > > PCI cap inits (MSI domains, PASID, ATS) into a new helper: > > iommu_init_device_caps(). > > > > Suggested-by: Vasant Hegde > > Signed-off-by: Pranjal Shrivastava > > --- > > drivers/iommu/amd/iommu.c | 114 +++++++++++++++++++------------------- > > 1 file changed, 56 insertions(+), 58 deletions(-) > > > > diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c > > index 4c31294fabc5..9b8ad131ba79 100644 > > --- a/drivers/iommu/amd/iommu.c > > +++ b/drivers/iommu/amd/iommu.c > > @@ -675,7 +675,8 @@ static void pdev_disable_caps(struct pci_dev *pdev) > > > .../... > > > - amd_iommu_set_pci_msi_domain(dev, iommu); > > + iommu_init_device_caps(dev_data, dev, iommu); > > iommu_dev = &iommu->iommu; > > > > - /* > > - * If IOMMU and device supports PASID then it will contain max > > - * supported PASIDs, else it will be zero. > > - */ > > - dev_data = dev_iommu_priv_get(dev); > > - if (amd_iommu_pasid_supported() && dev_is_pci(dev) && > > - pdev_pasid_supported(dev_data)) { > > - dev_data->max_pasids = min_t(u32, iommu->iommu.max_pasids, > > - pci_max_pasids(to_pci_dev(dev))); > > - } > > - > > Can you add something like below comment so that we know why we are not calling > iommu_ignore_device in error path. Ack, I'll add a comment about this. > > + * When DMA translation is unavailable return error so the iommu core > + * won't attempt domain attach for this device. But interrupt-remap > + * is still supported. Hence do not ignore the device. > > -Vasant > Thanks, Praan