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charset="iso-8859-1" Content-ID: <3BCBB2A3C5CAFF43A638A5CFBCE46934@EURP189.PROD.OUTLOOK.COM> Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: est.tech X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM7P189MB0807.EURP189.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-Network-Message-Id: 55f51336-81e8-44fe-6950-08df01f44cca X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Aug 2026 15:28:08.1449 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d2585e63-66b9-44b6-a76e-4f4b217d97fd X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: +Kzo0pWwnaJRJgPKQH+RLjF+kgVOmjo1QOD+Hly0SJq+JpDyqx4fX1u8QkZLx9tmm8xA5q7uUCPwBe4q76N68g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA2P189MB2730 Hello Kory, On Mon, Aug 24, 2026 at 12:46:35PM +0200, Kory Maincent wrote: > Hello Kyle, >=20 > Glad to see the v2 landing in the mailing list. Sure has taken a while, but finally here.... >=20 > On 8/20/26 16:25, Kyle Swenson wrote: > > Add the LTC4266 Power Sourcing Equipment controller device tree binding= s > > documentation. > >=20 > > Signed-off-by: Kyle Swenson > > --- > > .../bindings/net/pse-pd/lltc,ltc4266.yaml | 180 +++++++++++++++++= + > > 1 file changed, 180 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/net/pse-pd/lltc,= ltc4266.yaml > >=20 > > diff --git a/Documentation/devicetree/bindings/net/pse-pd/lltc,ltc4266.= yaml b/Documentation/devicetree/bindings/net/pse-pd/lltc,ltc4266.yaml > > new file mode 100644 > > index 000000000000..b3da8fea0b07 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/pse-pd/lltc,ltc4266.yaml > > @@ -0,0 +1,180 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/pse-pd/lltc,ltc4266.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Linear Technology LTC4266 Power Sourcing Equipment controller > > + > > +maintainers: > > + - Kyle Swenson > > + > > +allOf: > > + - $ref: pse-controller.yaml# > > + > > +properties: > > + compatible: > > + enum: > > + - lltc,ltc4266 > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + reset-gpios: > > + maxItems: 1 >=20 > The reset-gpios is currently not implemented in your driver. Maybe add it= in > the binding when it will be the case. I was trying to follow the "bindings document hardware" model but I've no problem dropping it in future versions. I would have added the reset-gpios support in the driver, but the hardware I've got with the LTC4266 has the LTC4266 reset connected to the board level reset and so I can't test this functionality if I were to add it. >=20 > > + channels: > > + type: object > > + additionalProperties: false > > + description: > > + Defines the 4 physical delivery channels on the controller that = can be > > + referenced by PSE PIs through their "pairsets" property. The act= ual port > > + matrix mapping is created when PSE PIs reference these channels = in their > > + pairsets. > > + > > + properties: > > + '#address-cells': > > + const: 1 > > + > > + '#size-cells': > > + const: 0 > > + > > + patternProperties: > > + '^channel@[0-3]$': > > + type: object > > + additionalProperties: false > > + > > + properties: > > + reg: > > + maxItems: 1 > > + > > + sense-resistor-micro-ohms: > > + description: Sense resistor connected to the channel's MOS= FET, used > > + for current measurement for overcurrent detection. > > + enum: [250000, 500000] > > + > > + required: > > + - reg > > + - sense-resistor-micro-ohms >=20 > I am bit skeptical about having sense-resistor-micro-ohms as a mandatory > parameter. As you have described it's only for current measurement so it'= s > not a requirement for PSE functioning. Maybe set it as a default value if > not specified. Well, on the LTC4266, the chipset depends on this current measurement to enforce per-class current limits, which is required for power budgeting. Maybe it'd be good for me to expclitly state that instead. >=20 > Else LGTM. Ack. >=20 > > + required: > > + - '#address-cells' > > + - '#size-cells' > > + > > + pse-pis: > > + type: object > > + additionalProperties: false > > + > > + properties: > > + '#address-cells': > > + const: 1 > > + > > + '#size-cells': > > + const: 0 > > + > > + patternProperties: > > + '^pse-pi@[0-3]$': > > + type: object > > + properties: > > + pairsets: > > + description: The LTC4266 delivers power to a PI over a sin= gle > > + pairset, driven by one of the controller's four channels= . There > > + is no 4-pair mode spreading a PI over two channels, so e= xactly > > + one channel phandle is expected. > > + maxItems: 1 > > + pairset-names: > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - channels > > + - pse-pis > > + > > +unevaluatedProperties: false > > + > > +examples: > > + - | > > + #include > > + > > + i2c { > > + #address-cells =3D <1>; > > + #size-cells =3D <0>; > > + > > + ethernet-pse@2f { > > + compatible =3D "lltc,ltc4266"; > > + reg =3D <0x2f>; > > + interrupts =3D <8 IRQ_TYPE_LEVEL_LOW>; > > + interrupt-parent =3D <&gpio>; > > + > > + channels { > > + #address-cells =3D <1>; > > + #size-cells =3D <0>; > > + > > + phys0: channel@0 { > > + reg =3D <0>; > > + sense-resistor-micro-ohms =3D <500000>; > > + }; > > + > > + phys1: channel@1 { > > + reg =3D <1>; > > + sense-resistor-micro-ohms =3D <500000>; > > + }; > > + > > + phys2: channel@2 { > > + reg =3D <2>; > > + sense-resistor-micro-ohms =3D <500000>; > > + }; > > + > > + phys3: channel@3 { > > + reg =3D <3>; > > + sense-resistor-micro-ohms =3D <500000>; > > + }; > > + }; > > + > > + pse-pis { > > + #address-cells =3D <1>; > > + #size-cells =3D <0>; > > + > > + pse_pi0: pse-pi@0 { > > + reg =3D <0>; > > + #pse-cells =3D <0>; > > + pairset-names =3D "alternative-a"; > > + pairsets =3D <&phys0>; > > + polarity-supported =3D "MDI"; > > + vpwr-supply =3D <&vreg_pse>; > > + }; > > + > > + pse_pi1: pse-pi@1 { > > + reg =3D <1>; > > + #pse-cells =3D <0>; > > + pairset-names =3D "alternative-a"; > > + pairsets =3D <&phys1>; > > + polarity-supported =3D "MDI"; > > + vpwr-supply =3D <&vreg_pse>; > > + }; > > + > > + pse_pi2: pse-pi@2 { > > + reg =3D <2>; > > + #pse-cells =3D <0>; > > + pairset-names =3D "alternative-a"; > > + pairsets =3D <&phys2>; > > + polarity-supported =3D "MDI"; > > + vpwr-supply =3D <&vreg_pse>; > > + }; > > + > > + pse_pi3: pse-pi@3 { > > + reg =3D <3>; > > + #pse-cells =3D <0>; > > + pairset-names =3D "alternative-a"; > > + pairsets =3D <&phys3>; > > + polarity-supported =3D "MDI"; > > + vpwr-supply =3D <&vreg_pse>; > > + }; > > + }; > > + }; > > + }; >=20 > --=20 > K=F6ry Maincent, Bootlin > Embedded Linux and kernel engineering > https://bootlin.com >=20 Thanks for the review! Thanks, Kyle=