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envelope-from=chao.liu@processmission.com; helo=SEYPR02CU001.outbound.protection.outlook.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Chao Liu From: Chao Liu via Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org On Fri, Aug 28, 2026 at 05:39:09PM +0800, Daniel Henrique Barboza wrote: > Similar to what we did with 'imsic' in the previous patch, including > creating a helper struct to encapsulate the extra arguments required to > create the FDT. > > TODO: I believe the tt-atlantis board can use this same helper too. We > just need to verify how to map the phandles used by it and what the > helper is using (which was inherited by the 'virt' board). > > No FDT changes intended. > > Signed-off-by: Daniel Henrique Barboza > Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Chao Liu Thanks, Chao > --- > hw/riscv/fdt-common.c | 109 ++++++++++++++++++++++++++ > hw/riscv/virt.c | 139 ++++++---------------------------- > include/hw/riscv/fdt-common.h | 19 +++++ > 3 files changed, 151 insertions(+), 116 deletions(-) > > diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c > index ae24ad0011..d815c5adff 100644 > --- a/hw/riscv/fdt-common.c > +++ b/hw/riscv/fdt-common.c > @@ -11,6 +11,7 @@ > #include "qemu/error-report.h" > #include "system/device_tree.h" > #include "hw/core/boards.h" > +#include "hw/core/sysbus-fdt.h" > #include "hw/riscv/fdt-common.h" > #include "target/riscv/cpu_bits.h" > #include "hw/riscv/riscv-iommu-bits.h" > @@ -593,3 +594,111 @@ void riscv_create_fdt_imsic(void *fdt, IMSICFdtProps *props, > imsic_num_bits(props->aia_guests + 1)); > > } > + > +/* Caller must free string after use */ > +static char *fdt_get_aplic_nodename(hwaddr aplic_addr) > +{ > + return g_strdup_printf("/soc/interrupt-controller@%"HWADDR_PRIx, > + aplic_addr); > +} > + > +static void create_fdt_one_aplic(void *fdt, APLICFdtProps *props, > + hwaddr aplic_addr, uint32_t aplic_size, > + uint32_t msi_phandle, > + uint32_t *intc_phandles, > + uint32_t aplic_phandle, > + uint32_t aplic_child_phandle, > + bool m_mode) > +{ > + g_autofree char *aplic_name = fdt_get_aplic_nodename(aplic_addr); > + g_autofree uint32_t *aplic_cells = g_new0(uint32_t, props->num_harts * 2); > + static const char * const aplic_compat[2] = { > + "qemu,aplic", "riscv,aplic" > + }; > + > + for (int cpu = 0; cpu < props->num_harts; cpu++) { > + aplic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); > + aplic_cells[cpu * 2 + 1] = cpu_to_be32(m_mode ? IRQ_M_EXT : IRQ_S_EXT); > + } > + > + qemu_fdt_add_subnode(fdt, aplic_name); > + qemu_fdt_setprop_string_array(fdt, aplic_name, "compatible", > + (char **)&aplic_compat, > + ARRAY_SIZE(aplic_compat)); > + qemu_fdt_setprop_cell(fdt, aplic_name, "#address-cells", > + FDT_APLIC_ADDR_CELLS); > + qemu_fdt_setprop_cell(fdt, aplic_name, > + "#interrupt-cells", FDT_APLIC_INT_CELLS); > + qemu_fdt_setprop(fdt, aplic_name, "interrupt-controller", NULL, 0); > + > + if (props->aia_type == AIA_TYPE_APLIC) { > + qemu_fdt_setprop(fdt, aplic_name, "interrupts-extended", > + aplic_cells, props->num_harts * sizeof(uint32_t) * 2); > + } else { > + qemu_fdt_setprop_cell(fdt, aplic_name, "msi-parent", msi_phandle); > + } > + > + qemu_fdt_setprop_sized_cells(fdt, aplic_name, "reg", > + 2, aplic_addr, 2, aplic_size); > + qemu_fdt_setprop_cell(fdt, aplic_name, "riscv,num-sources", > + props->irqchip_num_sources); > + > + if (aplic_child_phandle) { > + qemu_fdt_setprop_cell(fdt, aplic_name, "riscv,children", > + aplic_child_phandle); > + qemu_fdt_setprop_cells(fdt, aplic_name, "riscv,delegation", > + aplic_child_phandle, 0x1, > + props->irqchip_num_sources); > + } > + > + if (props->numa_enabled) { > + qemu_fdt_setprop_cell(fdt, aplic_name, "numa-node-id", props->socket); > + } > + > + qemu_fdt_setprop_cell(fdt, aplic_name, "phandle", aplic_phandle); > +} > + > +void riscv_create_fdt_socket_aplic(void *fdt, APLICFdtProps *props, > + uint32_t msi_m_phandle, > + uint32_t msi_s_phandle, > + uint32_t *next_phandle, > + uint32_t *intc_phandles, > + uint32_t *aplic_phandles) > +{ > + uint32_t aplic_m_phandle, aplic_s_phandle; > + hwaddr aplic_addr; > + > + if (next_phandle) { > + aplic_m_phandle = (*next_phandle)++; > + aplic_s_phandle = (*next_phandle)++; > + } else { > + aplic_m_phandle = qemu_fdt_alloc_phandle(fdt); > + aplic_s_phandle = qemu_fdt_alloc_phandle(fdt); > + } > + > + if (props->aplic_m) { > + /* M-level APLIC node */ > + aplic_addr = props->aplic_m->base + (props->aplic_m->size * props->socket); > + create_fdt_one_aplic(fdt, props, aplic_addr, props->aplic_m->size, > + msi_m_phandle, intc_phandles, > + aplic_m_phandle, aplic_s_phandle, > + true); > + } > + > + /* S-level APLIC node */ > + aplic_addr = props->aplic_s->base + (props->aplic_s->size * props->socket); > + create_fdt_one_aplic(fdt, props, aplic_addr, props->aplic_s->size, > + msi_s_phandle, intc_phandles, > + aplic_s_phandle, 0, > + false); > + > + if (!props->socket && props->platform_bus_irq) { > + g_autofree char *aplic_name = fdt_get_aplic_nodename(aplic_addr); > + platform_bus_add_all_fdt_nodes(fdt, aplic_name, > + props->platform_bus->base, > + props->platform_bus->size, > + props->platform_bus_irq); > + } > + > + aplic_phandles[props->socket] = aplic_s_phandle; > +} > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 468ec90696..a6ec9def16 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -320,113 +320,6 @@ static void create_fdt_socket_plic(RISCVVirtState *s, > } > } > > -/* Caller must free string after use */ > -static char *fdt_get_aplic_nodename(unsigned long aplic_addr) > -{ > - return g_strdup_printf("/soc/interrupt-controller@%lx", aplic_addr); > -} > - > -static void create_fdt_one_aplic(RISCVVirtState *s, int socket, > - unsigned long aplic_addr, uint32_t aplic_size, > - uint32_t msi_phandle, > - uint32_t *intc_phandles, > - uint32_t aplic_phandle, > - uint32_t aplic_child_phandle, > - bool m_mode, int num_harts) > -{ > - int cpu; > - g_autofree char *aplic_name = fdt_get_aplic_nodename(aplic_addr); > - g_autofree uint32_t *aplic_cells = g_new0(uint32_t, num_harts * 2); > - MachineState *ms = MACHINE(s); > - static const char * const aplic_compat[2] = { > - "qemu,aplic", "riscv,aplic" > - }; > - > - for (cpu = 0; cpu < num_harts; cpu++) { > - aplic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); > - aplic_cells[cpu * 2 + 1] = cpu_to_be32(m_mode ? IRQ_M_EXT : IRQ_S_EXT); > - } > - > - qemu_fdt_add_subnode(ms->fdt, aplic_name); > - qemu_fdt_setprop_string_array(ms->fdt, aplic_name, "compatible", > - (char **)&aplic_compat, > - ARRAY_SIZE(aplic_compat)); > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "#address-cells", > - FDT_APLIC_ADDR_CELLS); > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, > - "#interrupt-cells", FDT_APLIC_INT_CELLS); > - qemu_fdt_setprop(ms->fdt, aplic_name, "interrupt-controller", NULL, 0); > - > - if (s->aia_type == VIRT_AIA_TYPE_APLIC) { > - qemu_fdt_setprop(ms->fdt, aplic_name, "interrupts-extended", > - aplic_cells, num_harts * sizeof(uint32_t) * 2); > - } else { > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "msi-parent", msi_phandle); > - } > - > - qemu_fdt_setprop_sized_cells(ms->fdt, aplic_name, "reg", > - 2, aplic_addr, 2, aplic_size); > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,num-sources", > - VIRT_IRQCHIP_NUM_SOURCES); > - > - if (aplic_child_phandle) { > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,children", > - aplic_child_phandle); > - qemu_fdt_setprop_cells(ms->fdt, aplic_name, "riscv,delegation", > - aplic_child_phandle, 0x1, > - VIRT_IRQCHIP_NUM_SOURCES); > - } > - > - riscv_socket_fdt_write_id(ms, aplic_name, socket); > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "phandle", aplic_phandle); > -} > - > -static void create_fdt_socket_aplic(RISCVVirtState *s, > - int socket, > - uint32_t msi_m_phandle, > - uint32_t msi_s_phandle, > - uint32_t *phandle, > - uint32_t *intc_phandles, > - uint32_t *aplic_phandles, > - int num_harts) > -{ > - unsigned long aplic_addr; > - MachineState *ms = MACHINE(s); > - uint32_t aplic_m_phandle, aplic_s_phandle; > - > - aplic_m_phandle = (*phandle)++; > - aplic_s_phandle = (*phandle)++; > - > - if (!kvm_enabled()) { > - /* M-level APLIC node */ > - aplic_addr = s->memmap[VIRT_APLIC_M].base + > - (s->memmap[VIRT_APLIC_M].size * socket); > - create_fdt_one_aplic(s, socket, aplic_addr, > - s->memmap[VIRT_APLIC_M].size, > - msi_m_phandle, intc_phandles, > - aplic_m_phandle, aplic_s_phandle, > - true, num_harts); > - } > - > - /* S-level APLIC node */ > - aplic_addr = s->memmap[VIRT_APLIC_S].base + > - (s->memmap[VIRT_APLIC_S].size * socket); > - create_fdt_one_aplic(s, socket, aplic_addr, s->memmap[VIRT_APLIC_S].size, > - msi_s_phandle, intc_phandles, > - aplic_s_phandle, 0, > - false, num_harts); > - > - if (!socket) { > - g_autofree char *aplic_name = fdt_get_aplic_nodename(aplic_addr); > - platform_bus_add_all_fdt_nodes(ms->fdt, aplic_name, > - s->memmap[VIRT_PLATFORM_BUS].base, > - s->memmap[VIRT_PLATFORM_BUS].size, > - VIRT_PLATFORM_BUS_IRQ); > - } > - > - aplic_phandles[socket] = aplic_s_phandle; > -} > - > static void create_fdt_pmu(RISCVVirtState *s) > { > g_autofree char *pmu_name = g_strdup_printf("/pmu"); > @@ -453,6 +346,7 @@ static void create_fdt_sockets(RISCVVirtState *s, > int socket_count = riscv_socket_count(ms); > bool numa_enabled = riscv_numa_enabled(ms); > bool is_32_bit = riscv_is_32bit(&s->soc[0]); > + APLICFdtProps aplic_props; > > riscv_fdt_create_cpu_socket_subnode(ms->fdt, > kvm_enabled() ? kvm_riscv_get_timebase_frequency(&s->soc->harts[0]) : > @@ -510,15 +404,26 @@ static void create_fdt_sockets(RISCVVirtState *s, > *msi_pcie_phandle = msi_s_phandle; > } > > + if (s->aia_type != VIRT_AIA_TYPE_NONE) { > + aplic_props.aplic_m = !kvm_enabled() ? &s->memmap[VIRT_APLIC_M] : NULL; > + aplic_props.aplic_s = &s->memmap[VIRT_APLIC_S]; > + aplic_props.platform_bus = &s->memmap[VIRT_PLATFORM_BUS]; > + aplic_props.platform_bus_irq = VIRT_PLATFORM_BUS_IRQ; > + aplic_props.socket = 0; > + aplic_props.num_harts = ms->smp.cpus; > + aplic_props.numa_enabled = numa_enabled; > + aplic_props.irqchip_num_sources = VIRT_IRQCHIP_NUM_SOURCES; > + aplic_props.aia_type = s->aia_type; > + } > + > /* > * With KVM AIA aplic-imsic, using an irqchip without split > * mode, we'll use only one APLIC instance. > */ > if (!virt_use_emulated_aplic(s->aia_type)) { > - create_fdt_socket_aplic(s, 0, > - msi_m_phandle, msi_s_phandle, phandle, > - &intc_phandles[0], xplic_phandles, > - ms->smp.cpus); > + riscv_create_fdt_socket_aplic(ms->fdt, &aplic_props, > + msi_m_phandle, msi_s_phandle, phandle, > + &intc_phandles[0], xplic_phandles); > > *irq_mmio_phandle = xplic_phandles[0]; > *irq_virtio_phandle = xplic_phandles[0]; > @@ -533,11 +438,13 @@ static void create_fdt_sockets(RISCVVirtState *s, > &intc_phandles[phandle_pos], > xplic_phandles); > } else { > - create_fdt_socket_aplic(s, socket, > - msi_m_phandle, msi_s_phandle, phandle, > - &intc_phandles[phandle_pos], > - xplic_phandles, > - s->soc[socket].num_harts); > + aplic_props.socket = socket; > + aplic_props.num_harts = s->soc[socket].num_harts; > + riscv_create_fdt_socket_aplic(ms->fdt, &aplic_props, > + msi_m_phandle, msi_s_phandle, > + phandle, > + &intc_phandles[phandle_pos], > + xplic_phandles); > } > } > > diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h > index 182c03d8ce..8207cfee7b 100644 > --- a/include/hw/riscv/fdt-common.h > +++ b/include/hw/riscv/fdt-common.h > @@ -12,6 +12,7 @@ > #include "target/riscv/cpu.h" > #include "hw/core/boards.h" > #include "hw/riscv/riscv_hart.h" > +#include "exec/hwaddr.h" > > #define FDT_PCI_ADDR_CELLS 3 > #define FDT_PCI_INT_CELLS 1 > @@ -50,6 +51,18 @@ typedef struct IMSICFdtProps { > int aia_guests; > } IMSICFdtProps; > > +typedef struct APLICFdtProps { > + const MemMapEntry *aplic_m; > + const MemMapEntry *aplic_s; > + const MemMapEntry *platform_bus; > + int platform_bus_irq; > + int socket; > + int num_harts; > + bool numa_enabled; > + int irqchip_num_sources; > + int aia_type; > +} APLICFdtProps; > + > void *riscv_create_board_device_tree(const char *model, const char *compatible, > int *fdt_size); > void riscv_create_fdt_socket_memory(void *fdt, hwaddr addr, uint64_t size, > @@ -98,4 +111,10 @@ void riscv_create_fdt_pcie(void *fdt, int aia_type, bool has_iommu_sys, > void riscv_create_fdt_imsic(void *fdt, IMSICFdtProps *fdt_props, > uint32_t *next_phandle, uint32_t *intc_phandles, > uint32_t *msi_m_phandle, uint32_t *msi_s_phandle); > +void riscv_create_fdt_socket_aplic(void *fdt, APLICFdtProps *props, > + uint32_t msi_m_phandle, > + uint32_t msi_s_phandle, > + uint32_t *next_phandle, > + uint32_t *intc_phandles, > + uint32_t *aplic_phandles); > #endif > -- > 2.43.0 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F022EC61DD3 for ; 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envelope-from=chao.liu@processmission.com; helo=SEYPR02CU001.outbound.protection.outlook.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Chao Liu From: Chao Liu via qemu development Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, Aug 28, 2026 at 05:39:09PM +0800, Daniel Henrique Barboza wrote: > Similar to what we did with 'imsic' in the previous patch, including > creating a helper struct to encapsulate the extra arguments required to > create the FDT. > > TODO: I believe the tt-atlantis board can use this same helper too. We > just need to verify how to map the phandles used by it and what the > helper is using (which was inherited by the 'virt' board). > > No FDT changes intended. > > Signed-off-by: Daniel Henrique Barboza > Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Chao Liu Thanks, Chao > --- > hw/riscv/fdt-common.c | 109 ++++++++++++++++++++++++++ > hw/riscv/virt.c | 139 ++++++---------------------------- > include/hw/riscv/fdt-common.h | 19 +++++ > 3 files changed, 151 insertions(+), 116 deletions(-) > > diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c > index ae24ad0011..d815c5adff 100644 > --- a/hw/riscv/fdt-common.c > +++ b/hw/riscv/fdt-common.c > @@ -11,6 +11,7 @@ > #include "qemu/error-report.h" > #include "system/device_tree.h" > #include "hw/core/boards.h" > +#include "hw/core/sysbus-fdt.h" > #include "hw/riscv/fdt-common.h" > #include "target/riscv/cpu_bits.h" > #include "hw/riscv/riscv-iommu-bits.h" > @@ -593,3 +594,111 @@ void riscv_create_fdt_imsic(void *fdt, IMSICFdtProps *props, > imsic_num_bits(props->aia_guests + 1)); > > } > + > +/* Caller must free string after use */ > +static char *fdt_get_aplic_nodename(hwaddr aplic_addr) > +{ > + return g_strdup_printf("/soc/interrupt-controller@%"HWADDR_PRIx, > + aplic_addr); > +} > + > +static void create_fdt_one_aplic(void *fdt, APLICFdtProps *props, > + hwaddr aplic_addr, uint32_t aplic_size, > + uint32_t msi_phandle, > + uint32_t *intc_phandles, > + uint32_t aplic_phandle, > + uint32_t aplic_child_phandle, > + bool m_mode) > +{ > + g_autofree char *aplic_name = fdt_get_aplic_nodename(aplic_addr); > + g_autofree uint32_t *aplic_cells = g_new0(uint32_t, props->num_harts * 2); > + static const char * const aplic_compat[2] = { > + "qemu,aplic", "riscv,aplic" > + }; > + > + for (int cpu = 0; cpu < props->num_harts; cpu++) { > + aplic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); > + aplic_cells[cpu * 2 + 1] = cpu_to_be32(m_mode ? IRQ_M_EXT : IRQ_S_EXT); > + } > + > + qemu_fdt_add_subnode(fdt, aplic_name); > + qemu_fdt_setprop_string_array(fdt, aplic_name, "compatible", > + (char **)&aplic_compat, > + ARRAY_SIZE(aplic_compat)); > + qemu_fdt_setprop_cell(fdt, aplic_name, "#address-cells", > + FDT_APLIC_ADDR_CELLS); > + qemu_fdt_setprop_cell(fdt, aplic_name, > + "#interrupt-cells", FDT_APLIC_INT_CELLS); > + qemu_fdt_setprop(fdt, aplic_name, "interrupt-controller", NULL, 0); > + > + if (props->aia_type == AIA_TYPE_APLIC) { > + qemu_fdt_setprop(fdt, aplic_name, "interrupts-extended", > + aplic_cells, props->num_harts * sizeof(uint32_t) * 2); > + } else { > + qemu_fdt_setprop_cell(fdt, aplic_name, "msi-parent", msi_phandle); > + } > + > + qemu_fdt_setprop_sized_cells(fdt, aplic_name, "reg", > + 2, aplic_addr, 2, aplic_size); > + qemu_fdt_setprop_cell(fdt, aplic_name, "riscv,num-sources", > + props->irqchip_num_sources); > + > + if (aplic_child_phandle) { > + qemu_fdt_setprop_cell(fdt, aplic_name, "riscv,children", > + aplic_child_phandle); > + qemu_fdt_setprop_cells(fdt, aplic_name, "riscv,delegation", > + aplic_child_phandle, 0x1, > + props->irqchip_num_sources); > + } > + > + if (props->numa_enabled) { > + qemu_fdt_setprop_cell(fdt, aplic_name, "numa-node-id", props->socket); > + } > + > + qemu_fdt_setprop_cell(fdt, aplic_name, "phandle", aplic_phandle); > +} > + > +void riscv_create_fdt_socket_aplic(void *fdt, APLICFdtProps *props, > + uint32_t msi_m_phandle, > + uint32_t msi_s_phandle, > + uint32_t *next_phandle, > + uint32_t *intc_phandles, > + uint32_t *aplic_phandles) > +{ > + uint32_t aplic_m_phandle, aplic_s_phandle; > + hwaddr aplic_addr; > + > + if (next_phandle) { > + aplic_m_phandle = (*next_phandle)++; > + aplic_s_phandle = (*next_phandle)++; > + } else { > + aplic_m_phandle = qemu_fdt_alloc_phandle(fdt); > + aplic_s_phandle = qemu_fdt_alloc_phandle(fdt); > + } > + > + if (props->aplic_m) { > + /* M-level APLIC node */ > + aplic_addr = props->aplic_m->base + (props->aplic_m->size * props->socket); > + create_fdt_one_aplic(fdt, props, aplic_addr, props->aplic_m->size, > + msi_m_phandle, intc_phandles, > + aplic_m_phandle, aplic_s_phandle, > + true); > + } > + > + /* S-level APLIC node */ > + aplic_addr = props->aplic_s->base + (props->aplic_s->size * props->socket); > + create_fdt_one_aplic(fdt, props, aplic_addr, props->aplic_s->size, > + msi_s_phandle, intc_phandles, > + aplic_s_phandle, 0, > + false); > + > + if (!props->socket && props->platform_bus_irq) { > + g_autofree char *aplic_name = fdt_get_aplic_nodename(aplic_addr); > + platform_bus_add_all_fdt_nodes(fdt, aplic_name, > + props->platform_bus->base, > + props->platform_bus->size, > + props->platform_bus_irq); > + } > + > + aplic_phandles[props->socket] = aplic_s_phandle; > +} > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 468ec90696..a6ec9def16 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -320,113 +320,6 @@ static void create_fdt_socket_plic(RISCVVirtState *s, > } > } > > -/* Caller must free string after use */ > -static char *fdt_get_aplic_nodename(unsigned long aplic_addr) > -{ > - return g_strdup_printf("/soc/interrupt-controller@%lx", aplic_addr); > -} > - > -static void create_fdt_one_aplic(RISCVVirtState *s, int socket, > - unsigned long aplic_addr, uint32_t aplic_size, > - uint32_t msi_phandle, > - uint32_t *intc_phandles, > - uint32_t aplic_phandle, > - uint32_t aplic_child_phandle, > - bool m_mode, int num_harts) > -{ > - int cpu; > - g_autofree char *aplic_name = fdt_get_aplic_nodename(aplic_addr); > - g_autofree uint32_t *aplic_cells = g_new0(uint32_t, num_harts * 2); > - MachineState *ms = MACHINE(s); > - static const char * const aplic_compat[2] = { > - "qemu,aplic", "riscv,aplic" > - }; > - > - for (cpu = 0; cpu < num_harts; cpu++) { > - aplic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]); > - aplic_cells[cpu * 2 + 1] = cpu_to_be32(m_mode ? IRQ_M_EXT : IRQ_S_EXT); > - } > - > - qemu_fdt_add_subnode(ms->fdt, aplic_name); > - qemu_fdt_setprop_string_array(ms->fdt, aplic_name, "compatible", > - (char **)&aplic_compat, > - ARRAY_SIZE(aplic_compat)); > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "#address-cells", > - FDT_APLIC_ADDR_CELLS); > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, > - "#interrupt-cells", FDT_APLIC_INT_CELLS); > - qemu_fdt_setprop(ms->fdt, aplic_name, "interrupt-controller", NULL, 0); > - > - if (s->aia_type == VIRT_AIA_TYPE_APLIC) { > - qemu_fdt_setprop(ms->fdt, aplic_name, "interrupts-extended", > - aplic_cells, num_harts * sizeof(uint32_t) * 2); > - } else { > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "msi-parent", msi_phandle); > - } > - > - qemu_fdt_setprop_sized_cells(ms->fdt, aplic_name, "reg", > - 2, aplic_addr, 2, aplic_size); > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,num-sources", > - VIRT_IRQCHIP_NUM_SOURCES); > - > - if (aplic_child_phandle) { > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,children", > - aplic_child_phandle); > - qemu_fdt_setprop_cells(ms->fdt, aplic_name, "riscv,delegation", > - aplic_child_phandle, 0x1, > - VIRT_IRQCHIP_NUM_SOURCES); > - } > - > - riscv_socket_fdt_write_id(ms, aplic_name, socket); > - qemu_fdt_setprop_cell(ms->fdt, aplic_name, "phandle", aplic_phandle); > -} > - > -static void create_fdt_socket_aplic(RISCVVirtState *s, > - int socket, > - uint32_t msi_m_phandle, > - uint32_t msi_s_phandle, > - uint32_t *phandle, > - uint32_t *intc_phandles, > - uint32_t *aplic_phandles, > - int num_harts) > -{ > - unsigned long aplic_addr; > - MachineState *ms = MACHINE(s); > - uint32_t aplic_m_phandle, aplic_s_phandle; > - > - aplic_m_phandle = (*phandle)++; > - aplic_s_phandle = (*phandle)++; > - > - if (!kvm_enabled()) { > - /* M-level APLIC node */ > - aplic_addr = s->memmap[VIRT_APLIC_M].base + > - (s->memmap[VIRT_APLIC_M].size * socket); > - create_fdt_one_aplic(s, socket, aplic_addr, > - s->memmap[VIRT_APLIC_M].size, > - msi_m_phandle, intc_phandles, > - aplic_m_phandle, aplic_s_phandle, > - true, num_harts); > - } > - > - /* S-level APLIC node */ > - aplic_addr = s->memmap[VIRT_APLIC_S].base + > - (s->memmap[VIRT_APLIC_S].size * socket); > - create_fdt_one_aplic(s, socket, aplic_addr, s->memmap[VIRT_APLIC_S].size, > - msi_s_phandle, intc_phandles, > - aplic_s_phandle, 0, > - false, num_harts); > - > - if (!socket) { > - g_autofree char *aplic_name = fdt_get_aplic_nodename(aplic_addr); > - platform_bus_add_all_fdt_nodes(ms->fdt, aplic_name, > - s->memmap[VIRT_PLATFORM_BUS].base, > - s->memmap[VIRT_PLATFORM_BUS].size, > - VIRT_PLATFORM_BUS_IRQ); > - } > - > - aplic_phandles[socket] = aplic_s_phandle; > -} > - > static void create_fdt_pmu(RISCVVirtState *s) > { > g_autofree char *pmu_name = g_strdup_printf("/pmu"); > @@ -453,6 +346,7 @@ static void create_fdt_sockets(RISCVVirtState *s, > int socket_count = riscv_socket_count(ms); > bool numa_enabled = riscv_numa_enabled(ms); > bool is_32_bit = riscv_is_32bit(&s->soc[0]); > + APLICFdtProps aplic_props; > > riscv_fdt_create_cpu_socket_subnode(ms->fdt, > kvm_enabled() ? kvm_riscv_get_timebase_frequency(&s->soc->harts[0]) : > @@ -510,15 +404,26 @@ static void create_fdt_sockets(RISCVVirtState *s, > *msi_pcie_phandle = msi_s_phandle; > } > > + if (s->aia_type != VIRT_AIA_TYPE_NONE) { > + aplic_props.aplic_m = !kvm_enabled() ? &s->memmap[VIRT_APLIC_M] : NULL; > + aplic_props.aplic_s = &s->memmap[VIRT_APLIC_S]; > + aplic_props.platform_bus = &s->memmap[VIRT_PLATFORM_BUS]; > + aplic_props.platform_bus_irq = VIRT_PLATFORM_BUS_IRQ; > + aplic_props.socket = 0; > + aplic_props.num_harts = ms->smp.cpus; > + aplic_props.numa_enabled = numa_enabled; > + aplic_props.irqchip_num_sources = VIRT_IRQCHIP_NUM_SOURCES; > + aplic_props.aia_type = s->aia_type; > + } > + > /* > * With KVM AIA aplic-imsic, using an irqchip without split > * mode, we'll use only one APLIC instance. > */ > if (!virt_use_emulated_aplic(s->aia_type)) { > - create_fdt_socket_aplic(s, 0, > - msi_m_phandle, msi_s_phandle, phandle, > - &intc_phandles[0], xplic_phandles, > - ms->smp.cpus); > + riscv_create_fdt_socket_aplic(ms->fdt, &aplic_props, > + msi_m_phandle, msi_s_phandle, phandle, > + &intc_phandles[0], xplic_phandles); > > *irq_mmio_phandle = xplic_phandles[0]; > *irq_virtio_phandle = xplic_phandles[0]; > @@ -533,11 +438,13 @@ static void create_fdt_sockets(RISCVVirtState *s, > &intc_phandles[phandle_pos], > xplic_phandles); > } else { > - create_fdt_socket_aplic(s, socket, > - msi_m_phandle, msi_s_phandle, phandle, > - &intc_phandles[phandle_pos], > - xplic_phandles, > - s->soc[socket].num_harts); > + aplic_props.socket = socket; > + aplic_props.num_harts = s->soc[socket].num_harts; > + riscv_create_fdt_socket_aplic(ms->fdt, &aplic_props, > + msi_m_phandle, msi_s_phandle, > + phandle, > + &intc_phandles[phandle_pos], > + xplic_phandles); > } > } > > diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h > index 182c03d8ce..8207cfee7b 100644 > --- a/include/hw/riscv/fdt-common.h > +++ b/include/hw/riscv/fdt-common.h > @@ -12,6 +12,7 @@ > #include "target/riscv/cpu.h" > #include "hw/core/boards.h" > #include "hw/riscv/riscv_hart.h" > +#include "exec/hwaddr.h" > > #define FDT_PCI_ADDR_CELLS 3 > #define FDT_PCI_INT_CELLS 1 > @@ -50,6 +51,18 @@ typedef struct IMSICFdtProps { > int aia_guests; > } IMSICFdtProps; > > +typedef struct APLICFdtProps { > + const MemMapEntry *aplic_m; > + const MemMapEntry *aplic_s; > + const MemMapEntry *platform_bus; > + int platform_bus_irq; > + int socket; > + int num_harts; > + bool numa_enabled; > + int irqchip_num_sources; > + int aia_type; > +} APLICFdtProps; > + > void *riscv_create_board_device_tree(const char *model, const char *compatible, > int *fdt_size); > void riscv_create_fdt_socket_memory(void *fdt, hwaddr addr, uint64_t size, > @@ -98,4 +111,10 @@ void riscv_create_fdt_pcie(void *fdt, int aia_type, bool has_iommu_sys, > void riscv_create_fdt_imsic(void *fdt, IMSICFdtProps *fdt_props, > uint32_t *next_phandle, uint32_t *intc_phandles, > uint32_t *msi_m_phandle, uint32_t *msi_s_phandle); > +void riscv_create_fdt_socket_aplic(void *fdt, APLICFdtProps *props, > + uint32_t msi_m_phandle, > + uint32_t msi_s_phandle, > + uint32_t *next_phandle, > + uint32_t *intc_phandles, > + uint32_t *aplic_phandles); > #endif > -- > 2.43.0 >