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envelope-from=chao.liu@processmission.com; helo=TYPPR03CU001.outbound.protection.outlook.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Chao Liu From: Chao Liu via Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org On Fri, Aug 28, 2026 at 05:39:16PM +0800, Daniel Henrique Barboza wrote: > The GPEX_HOST initialization in 'virt' can be moved to device-common.c > and be re-used later for other boards, namely the future > 'riscv-server-ref' emulation. > > Signed-off-by: Daniel Henrique Barboza > Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Chao Liu Thanks, Chao > --- > hw/riscv/device-common.c | 76 +++++++++++++++++++++++++++++++ > hw/riscv/virt.c | 77 ++------------------------------ > include/hw/riscv/device-common.h | 7 +++ > 3 files changed, 87 insertions(+), 73 deletions(-) > > diff --git a/hw/riscv/device-common.c b/hw/riscv/device-common.c > index a054cd7114..d1a6814f87 100644 > --- a/hw/riscv/device-common.c > +++ b/hw/riscv/device-common.c > @@ -15,6 +15,8 @@ > #include "hw/core/qdev.h" > #include "hw/core/qdev-properties.h" > #include "hw/core/sysbus.h" > +#include "hw/pci/pci.h" > +#include "hw/pci-host/gpex.h" > #include "qapi/error.h" > #include "qom/object.h" > #include "system/address-spaces.h" > @@ -90,3 +92,77 @@ void riscv_init_flash_map(PFlashCFI01 *flash, hwaddr base, hwaddr size, > memory_region_add_subregion(sysmem, base, > sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); > } > + > +DeviceState *riscv_gpex_pcie_init(MemoryRegion *sys_mem, > + DeviceState *irqchip, > + const MemMapEntry *pcie_ecam_mem, > + const MemMapEntry *pcie_mmio_mem, > + const MemMapEntry *high_pcie_mmio_mem, > + const MemMapEntry *pcie_pio_mem, > + int pcie_irq) > +{ > + DeviceState *dev; > + MemoryRegion *ecam_alias, *ecam_reg; > + MemoryRegion *mmio_alias, *high_mmio_alias, *mmio_reg; > + hwaddr ecam_base = pcie_ecam_mem->base; > + hwaddr ecam_size = pcie_ecam_mem->size; > + hwaddr mmio_base = pcie_mmio_mem->base; > + hwaddr mmio_size = pcie_mmio_mem->size; > + hwaddr high_mmio_base = high_pcie_mmio_mem->base; > + hwaddr high_mmio_size = high_pcie_mmio_mem->size; > + hwaddr pio_base = pcie_pio_mem->base; > + hwaddr pio_size = pcie_pio_mem->size; > + > + dev = qdev_new(TYPE_GPEX_HOST); > + > + /* Set GPEX object properties for the virt machine */ > + object_property_set_uint(OBJECT(dev), PCI_HOST_ECAM_BASE, > + ecam_base, NULL); > + object_property_set_int(OBJECT(dev), PCI_HOST_ECAM_SIZE, > + ecam_size, NULL); > + object_property_set_uint(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_BASE, > + mmio_base, NULL); > + object_property_set_int(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_SIZE, > + mmio_size, NULL); > + object_property_set_uint(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_BASE, > + high_mmio_base, NULL); > + object_property_set_int(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_SIZE, > + high_mmio_size, NULL); > + object_property_set_uint(OBJECT(dev), PCI_HOST_PIO_BASE, > + pio_base, NULL); > + object_property_set_int(OBJECT(dev), PCI_HOST_PIO_SIZE, > + pio_size, NULL); > + > + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); > + > + ecam_alias = g_new0(MemoryRegion, 1); > + ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); > + memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", > + ecam_reg, 0, ecam_size); > + memory_region_add_subregion(get_system_memory(), ecam_base, ecam_alias); > + > + mmio_alias = g_new0(MemoryRegion, 1); > + mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1); > + memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", > + mmio_reg, mmio_base, mmio_size); > + memory_region_add_subregion(get_system_memory(), mmio_base, mmio_alias); > + > + /* Map high MMIO space */ > + high_mmio_alias = g_new0(MemoryRegion, 1); > + memory_region_init_alias(high_mmio_alias, OBJECT(dev), "pcie-mmio-high", > + mmio_reg, high_mmio_base, high_mmio_size); > + memory_region_add_subregion(get_system_memory(), high_mmio_base, > + high_mmio_alias); > + > + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, pio_base); > + > + for (int i = 0; i < PCI_NUM_PINS; i++) { > + qemu_irq irq = qdev_get_gpio_in(irqchip, pcie_irq + i); > + > + sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq); > + gpex_set_irq_num(GPEX_HOST(dev), i, pcie_irq + i); > + } > + > + GPEX_HOST(dev)->gpex_cfg.bus = PCI_HOST_BRIDGE(dev)->bus; > + return dev; > +} > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 9ff5beae77..d75dec2dd2 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -540,78 +540,6 @@ static void create_fdt(RISCVVirtState *s) > create_fdt_pmu(s); > } > > -static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, > - DeviceState *irqchip, > - RISCVVirtState *s) > -{ > - DeviceState *dev; > - MemoryRegion *ecam_alias, *ecam_reg; > - MemoryRegion *mmio_alias, *high_mmio_alias, *mmio_reg; > - hwaddr ecam_base = s->memmap[VIRT_PCIE_ECAM].base; > - hwaddr ecam_size = s->memmap[VIRT_PCIE_ECAM].size; > - hwaddr mmio_base = s->memmap[VIRT_PCIE_MMIO].base; > - hwaddr mmio_size = s->memmap[VIRT_PCIE_MMIO].size; > - hwaddr high_mmio_base = virt_high_pcie_memmap.base; > - hwaddr high_mmio_size = virt_high_pcie_memmap.size; > - hwaddr pio_base = s->memmap[VIRT_PCIE_PIO].base; > - hwaddr pio_size = s->memmap[VIRT_PCIE_PIO].size; > - qemu_irq irq; > - int i; > - > - dev = qdev_new(TYPE_GPEX_HOST); > - > - /* Set GPEX object properties for the virt machine */ > - object_property_set_uint(OBJECT(dev), PCI_HOST_ECAM_BASE, > - ecam_base, NULL); > - object_property_set_int(OBJECT(dev), PCI_HOST_ECAM_SIZE, > - ecam_size, NULL); > - object_property_set_uint(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_BASE, > - mmio_base, NULL); > - object_property_set_int(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_SIZE, > - mmio_size, NULL); > - object_property_set_uint(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_BASE, > - high_mmio_base, NULL); > - object_property_set_int(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_SIZE, > - high_mmio_size, NULL); > - object_property_set_uint(OBJECT(dev), PCI_HOST_PIO_BASE, > - pio_base, NULL); > - object_property_set_int(OBJECT(dev), PCI_HOST_PIO_SIZE, > - pio_size, NULL); > - > - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); > - > - ecam_alias = g_new0(MemoryRegion, 1); > - ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); > - memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", > - ecam_reg, 0, ecam_size); > - memory_region_add_subregion(get_system_memory(), ecam_base, ecam_alias); > - > - mmio_alias = g_new0(MemoryRegion, 1); > - mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1); > - memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", > - mmio_reg, mmio_base, mmio_size); > - memory_region_add_subregion(get_system_memory(), mmio_base, mmio_alias); > - > - /* Map high MMIO space */ > - high_mmio_alias = g_new0(MemoryRegion, 1); > - memory_region_init_alias(high_mmio_alias, OBJECT(dev), "pcie-mmio-high", > - mmio_reg, high_mmio_base, high_mmio_size); > - memory_region_add_subregion(get_system_memory(), high_mmio_base, > - high_mmio_alias); > - > - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, pio_base); > - > - for (i = 0; i < PCI_NUM_PINS; i++) { > - irq = qdev_get_gpio_in(irqchip, PCIE_IRQ + i); > - > - sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq); > - gpex_set_irq_num(GPEX_HOST(dev), i, PCIE_IRQ + i); > - } > - > - GPEX_HOST(dev)->gpex_cfg.bus = PCI_HOST_BRIDGE(dev)->bus; > - return dev; > -} > - > static FWCfgState *create_fw_cfg(const MachineState *ms, hwaddr base) > { > FWCfgState *fw_cfg; > @@ -963,7 +891,10 @@ static void virt_machine_init(MachineState *machine) > qdev_get_gpio_in(virtio_irqchip, VIRTIO_IRQ + i)); > } > > - gpex_pcie_init(system_memory, pcie_irqchip, s); > + riscv_gpex_pcie_init(system_memory, pcie_irqchip, > + &s->memmap[VIRT_PCIE_ECAM], &s->memmap[VIRT_PCIE_MMIO], > + &virt_high_pcie_memmap, &s->memmap[VIRT_PCIE_PIO], > + PCIE_IRQ); > > s->platform_bus_dev = riscv_create_platform_bus(mmio_irqchip, > &s->memmap[VIRT_PLATFORM_BUS], VIRT_PLATFORM_BUS_IRQ, > diff --git a/include/hw/riscv/device-common.h b/include/hw/riscv/device-common.h > index 9f8bc67a1d..572912ec36 100644 > --- a/include/hw/riscv/device-common.h > +++ b/include/hw/riscv/device-common.h > @@ -22,4 +22,11 @@ PFlashCFI01 *riscv_flash_create(Object *parent, const char *name, > int flash_sector_size); > void riscv_init_flash_map(PFlashCFI01 *flash, hwaddr base, hwaddr size, > MemoryRegion *sysmem, int flash_sector_size); > +DeviceState *riscv_gpex_pcie_init(MemoryRegion *sys_mem, > + DeviceState *irqchip, > + const MemMapEntry *pcie_ecam_mem, > + const MemMapEntry *pcie_mmio_mem, > + const MemMapEntry *high_pcie_mmio_mem, > + const MemMapEntry *pcie_pio_mem, > + int pcie_irq); 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envelope-from=chao.liu@processmission.com; helo=TYPPR03CU001.outbound.protection.outlook.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Chao Liu From: Chao Liu via qemu development Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, Aug 28, 2026 at 05:39:16PM +0800, Daniel Henrique Barboza wrote: > The GPEX_HOST initialization in 'virt' can be moved to device-common.c > and be re-used later for other boards, namely the future > 'riscv-server-ref' emulation. > > Signed-off-by: Daniel Henrique Barboza > Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Chao Liu Thanks, Chao > --- > hw/riscv/device-common.c | 76 +++++++++++++++++++++++++++++++ > hw/riscv/virt.c | 77 ++------------------------------ > include/hw/riscv/device-common.h | 7 +++ > 3 files changed, 87 insertions(+), 73 deletions(-) > > diff --git a/hw/riscv/device-common.c b/hw/riscv/device-common.c > index a054cd7114..d1a6814f87 100644 > --- a/hw/riscv/device-common.c > +++ b/hw/riscv/device-common.c > @@ -15,6 +15,8 @@ > #include "hw/core/qdev.h" > #include "hw/core/qdev-properties.h" > #include "hw/core/sysbus.h" > +#include "hw/pci/pci.h" > +#include "hw/pci-host/gpex.h" > #include "qapi/error.h" > #include "qom/object.h" > #include "system/address-spaces.h" > @@ -90,3 +92,77 @@ void riscv_init_flash_map(PFlashCFI01 *flash, hwaddr base, hwaddr size, > memory_region_add_subregion(sysmem, base, > sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); > } > + > +DeviceState *riscv_gpex_pcie_init(MemoryRegion *sys_mem, > + DeviceState *irqchip, > + const MemMapEntry *pcie_ecam_mem, > + const MemMapEntry *pcie_mmio_mem, > + const MemMapEntry *high_pcie_mmio_mem, > + const MemMapEntry *pcie_pio_mem, > + int pcie_irq) > +{ > + DeviceState *dev; > + MemoryRegion *ecam_alias, *ecam_reg; > + MemoryRegion *mmio_alias, *high_mmio_alias, *mmio_reg; > + hwaddr ecam_base = pcie_ecam_mem->base; > + hwaddr ecam_size = pcie_ecam_mem->size; > + hwaddr mmio_base = pcie_mmio_mem->base; > + hwaddr mmio_size = pcie_mmio_mem->size; > + hwaddr high_mmio_base = high_pcie_mmio_mem->base; > + hwaddr high_mmio_size = high_pcie_mmio_mem->size; > + hwaddr pio_base = pcie_pio_mem->base; > + hwaddr pio_size = pcie_pio_mem->size; > + > + dev = qdev_new(TYPE_GPEX_HOST); > + > + /* Set GPEX object properties for the virt machine */ > + object_property_set_uint(OBJECT(dev), PCI_HOST_ECAM_BASE, > + ecam_base, NULL); > + object_property_set_int(OBJECT(dev), PCI_HOST_ECAM_SIZE, > + ecam_size, NULL); > + object_property_set_uint(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_BASE, > + mmio_base, NULL); > + object_property_set_int(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_SIZE, > + mmio_size, NULL); > + object_property_set_uint(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_BASE, > + high_mmio_base, NULL); > + object_property_set_int(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_SIZE, > + high_mmio_size, NULL); > + object_property_set_uint(OBJECT(dev), PCI_HOST_PIO_BASE, > + pio_base, NULL); > + object_property_set_int(OBJECT(dev), PCI_HOST_PIO_SIZE, > + pio_size, NULL); > + > + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); > + > + ecam_alias = g_new0(MemoryRegion, 1); > + ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); > + memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", > + ecam_reg, 0, ecam_size); > + memory_region_add_subregion(get_system_memory(), ecam_base, ecam_alias); > + > + mmio_alias = g_new0(MemoryRegion, 1); > + mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1); > + memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", > + mmio_reg, mmio_base, mmio_size); > + memory_region_add_subregion(get_system_memory(), mmio_base, mmio_alias); > + > + /* Map high MMIO space */ > + high_mmio_alias = g_new0(MemoryRegion, 1); > + memory_region_init_alias(high_mmio_alias, OBJECT(dev), "pcie-mmio-high", > + mmio_reg, high_mmio_base, high_mmio_size); > + memory_region_add_subregion(get_system_memory(), high_mmio_base, > + high_mmio_alias); > + > + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, pio_base); > + > + for (int i = 0; i < PCI_NUM_PINS; i++) { > + qemu_irq irq = qdev_get_gpio_in(irqchip, pcie_irq + i); > + > + sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq); > + gpex_set_irq_num(GPEX_HOST(dev), i, pcie_irq + i); > + } > + > + GPEX_HOST(dev)->gpex_cfg.bus = PCI_HOST_BRIDGE(dev)->bus; > + return dev; > +} > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 9ff5beae77..d75dec2dd2 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -540,78 +540,6 @@ static void create_fdt(RISCVVirtState *s) > create_fdt_pmu(s); > } > > -static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, > - DeviceState *irqchip, > - RISCVVirtState *s) > -{ > - DeviceState *dev; > - MemoryRegion *ecam_alias, *ecam_reg; > - MemoryRegion *mmio_alias, *high_mmio_alias, *mmio_reg; > - hwaddr ecam_base = s->memmap[VIRT_PCIE_ECAM].base; > - hwaddr ecam_size = s->memmap[VIRT_PCIE_ECAM].size; > - hwaddr mmio_base = s->memmap[VIRT_PCIE_MMIO].base; > - hwaddr mmio_size = s->memmap[VIRT_PCIE_MMIO].size; > - hwaddr high_mmio_base = virt_high_pcie_memmap.base; > - hwaddr high_mmio_size = virt_high_pcie_memmap.size; > - hwaddr pio_base = s->memmap[VIRT_PCIE_PIO].base; > - hwaddr pio_size = s->memmap[VIRT_PCIE_PIO].size; > - qemu_irq irq; > - int i; > - > - dev = qdev_new(TYPE_GPEX_HOST); > - > - /* Set GPEX object properties for the virt machine */ > - object_property_set_uint(OBJECT(dev), PCI_HOST_ECAM_BASE, > - ecam_base, NULL); > - object_property_set_int(OBJECT(dev), PCI_HOST_ECAM_SIZE, > - ecam_size, NULL); > - object_property_set_uint(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_BASE, > - mmio_base, NULL); > - object_property_set_int(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_SIZE, > - mmio_size, NULL); > - object_property_set_uint(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_BASE, > - high_mmio_base, NULL); > - object_property_set_int(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_SIZE, > - high_mmio_size, NULL); > - object_property_set_uint(OBJECT(dev), PCI_HOST_PIO_BASE, > - pio_base, NULL); > - object_property_set_int(OBJECT(dev), PCI_HOST_PIO_SIZE, > - pio_size, NULL); > - > - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); > - > - ecam_alias = g_new0(MemoryRegion, 1); > - ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); > - memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", > - ecam_reg, 0, ecam_size); > - memory_region_add_subregion(get_system_memory(), ecam_base, ecam_alias); > - > - mmio_alias = g_new0(MemoryRegion, 1); > - mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1); > - memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", > - mmio_reg, mmio_base, mmio_size); > - memory_region_add_subregion(get_system_memory(), mmio_base, mmio_alias); > - > - /* Map high MMIO space */ > - high_mmio_alias = g_new0(MemoryRegion, 1); > - memory_region_init_alias(high_mmio_alias, OBJECT(dev), "pcie-mmio-high", > - mmio_reg, high_mmio_base, high_mmio_size); > - memory_region_add_subregion(get_system_memory(), high_mmio_base, > - high_mmio_alias); > - > - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, pio_base); > - > - for (i = 0; i < PCI_NUM_PINS; i++) { > - irq = qdev_get_gpio_in(irqchip, PCIE_IRQ + i); > - > - sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq); > - gpex_set_irq_num(GPEX_HOST(dev), i, PCIE_IRQ + i); > - } > - > - GPEX_HOST(dev)->gpex_cfg.bus = PCI_HOST_BRIDGE(dev)->bus; > - return dev; > -} > - > static FWCfgState *create_fw_cfg(const MachineState *ms, hwaddr base) > { > FWCfgState *fw_cfg; > @@ -963,7 +891,10 @@ static void virt_machine_init(MachineState *machine) > qdev_get_gpio_in(virtio_irqchip, VIRTIO_IRQ + i)); > } > > - gpex_pcie_init(system_memory, pcie_irqchip, s); > + riscv_gpex_pcie_init(system_memory, pcie_irqchip, > + &s->memmap[VIRT_PCIE_ECAM], &s->memmap[VIRT_PCIE_MMIO], > + &virt_high_pcie_memmap, &s->memmap[VIRT_PCIE_PIO], > + PCIE_IRQ); > > s->platform_bus_dev = riscv_create_platform_bus(mmio_irqchip, > &s->memmap[VIRT_PLATFORM_BUS], VIRT_PLATFORM_BUS_IRQ, > diff --git a/include/hw/riscv/device-common.h b/include/hw/riscv/device-common.h > index 9f8bc67a1d..572912ec36 100644 > --- a/include/hw/riscv/device-common.h > +++ b/include/hw/riscv/device-common.h > @@ -22,4 +22,11 @@ PFlashCFI01 *riscv_flash_create(Object *parent, const char *name, > int flash_sector_size); > void riscv_init_flash_map(PFlashCFI01 *flash, hwaddr base, hwaddr size, > MemoryRegion *sysmem, int flash_sector_size); > +DeviceState *riscv_gpex_pcie_init(MemoryRegion *sys_mem, > + DeviceState *irqchip, > + const MemMapEntry *pcie_ecam_mem, > + const MemMapEntry *pcie_mmio_mem, > + const MemMapEntry *high_pcie_mmio_mem, > + const MemMapEntry *pcie_pio_mem, > + int pcie_irq); > #endif > -- > 2.43.0 >