From: Matthew Brost <matthew.brost@intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: "Matthew Auld" <matthew.auld@intel.com>,
intel-xe@lists.freedesktop.org,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 5/5] drm/xe/vram: add early VRAM health check
Date: Mon, 31 Aug 2026 13:50:30 -0700 [thread overview]
Message-ID: <apXpFrudX40122y/@gsse-cloud1.jf.intel.com> (raw)
In-Reply-To: <CAHk-=wgfOhJwVoe_5AZ5LYRG-hTmBZiBh1EydqCn2qjTakRWow@mail.gmail.com>
On Fri, Aug 28, 2026 at 01:32:31PM -0700, Linus Torvalds wrote:
> On Fri, 28 Aug 2026 at 12:58, Matthew Brost <matthew.brost@intel.com> wrote:
> >
> > I think it's OK to go ahead with backporting your patch to stable. I had
> > an open question about whether we wanted to implement the fix slightly
> > differently to avoid asserts triggering elsewhere in the code [1]
>
> Hmm. That patch is odd.
>
Yes, a little.
> It says
>
> "When VRAM limit (usable_size) is no longer 2M aligned (e.g. because flat
> CCS storage size rounds it down to 4K)," [...]
>
> but that was never true, even before my fix. The usable size was
> either 64kB aligned or 128kB aligned - it has *never* been 2M aligned
> as far as I can tell.
>
> Now, obviously, if alignment never did anything at all (because CCS
> was already completely aligned), then that 2M alignment could be true.
>
> So maybe the 2M alignment existed in practice, but it was certainly
> never guaranteed by any code, and any 2M assumptions were completely
> bogus long before my fix as far as I can tell.
Yes, this just happened to be true because of the rounded-up 128K
alignment. Nothing actually enforced it, nor was it required.
>
> But that commit is odd in another way: it changes the code to do
> something completely different.
>
> Before, it didn't use "usable_size" at all, it used thje *actual*
> physical size. Which really *was* 2M aligned, becuase I don't think
> Intel has ever sold any other configurations than 16/24/64GB of
> memory.
>
> So I don't think [1] actually exposes anything in my fix and I think
> the whole 2M limit wrt that code is actually an entirely separate
> issue.
Also correct. Your change prompted us to audit and clean up our code.
That said, with your fix alone and CONFIG_DRM_XE_DEBUG enabled, our old
bogus assertion will trigger, but it is meaningless. In any case, no
production kernel enables this option.
>
> But I admittedly *really* don't know this hardware very well at all.
>
> But yes, this kind of "my fix exposed *another* bug" was why I was
> worried about backporting it without further testing.
That was my concern too, but our audit showed that the only issue was a
bogus assertion that fell out. It isn't a blocker for getting your fix
into stable.
Matt
>
> Linus
next prev parent reply other threads:[~2026-08-31 20:50 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-28 15:14 [PATCH 0/5] VRAM health check + CCS fix Matthew Auld
2026-08-28 15:14 ` [PATCH 1/5] drm/xe/migrate: support 4K PTEs for identity map Matthew Auld
2026-08-28 19:46 ` Matthew Brost
2026-09-01 8:48 ` Matthew Auld
2026-09-01 20:07 ` Matthew Brost
2026-08-28 15:14 ` [PATCH 2/5] drm/xe: Don't hand out the flat CCS storage as usable VRAM Matthew Auld
2026-08-28 15:14 ` [PATCH 3/5] drm/xe/vram: report FLAT_CCS base misalignment Matthew Auld
2026-08-28 20:10 ` Matthew Brost
2026-09-01 8:23 ` Matthew Auld
2026-09-01 20:10 ` Matthew Brost
2026-08-28 15:14 ` [PATCH 4/5] drm/xe: add force option for global invalidation Matthew Auld
2026-09-01 20:29 ` Matthew Brost
2026-08-28 15:14 ` [PATCH 5/5] drm/xe/vram: add early VRAM health check Matthew Auld
2026-08-28 16:13 ` Linus Torvalds
2026-08-28 19:58 ` Matthew Brost
2026-08-28 20:32 ` Linus Torvalds
2026-08-31 20:50 ` Matthew Brost [this message]
2026-08-28 16:37 ` Summers, Stuart
2026-09-01 8:33 ` Matthew Auld
2026-09-02 7:45 ` Matthew Brost
2026-09-02 20:34 ` Summers, Stuart
2026-09-03 9:57 ` Matthew Auld
2026-08-28 15:21 ` ✓ CI.KUnit: success for VRAM health check + CCS fix Patchwork
2026-08-28 15:58 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-28 17:06 ` ✓ Xe.CI.FULL: " Patchwork
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