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[35.189.192.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49cdce0d22dsm69399515e9.4.2026.09.01.07.01.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Sep 2026 07:01:07 -0700 (PDT) Date: Tue, 1 Sep 2026 14:01:01 +0000 From: Mostafa Saleh To: Tao Tang Cc: Eric Auger , Peter Maydell , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Chen Baozi , Pierrick Bouvier , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , Chao Liu , Jim MacArthur Subject: Re: [RFC v5 07/28] hw/arm/smmuv3: Reject secure STEs with stage-2 enabled Message-ID: References: <20260813161515.2788900-1-tangtao1634@phytium.com.cn> <20260813162446.2806393-2-tangtao1634@phytium.com.cn> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260813162446.2806393-2-tangtao1634@phytium.com.cn> Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=smostafa@google.com; helo=mail-wm1-x335.google.com X-Spam_score_int: -175 X-Spam_score: -17.6 X-Spam_bar: ----------------- X-Spam_report: (-17.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, ENV_AND_HDR_SPF_MATCH=-0.5, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5, USER_IN_DEF_SPF_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Fri, Aug 14, 2026 at 12:24:43AM +0800, Tao Tang wrote: > Pass sec_sid into decode_ste() and treat a secure STE that enables stage-2 > translation as an illegal STE. > > The current model does not implement Secure stage-2 translation, so reject > Secure STE configurations that enable stage 2 and report BAD_STE. This > restriction can be relaxed when SEL2 and Secure stage-2 support are > implemented. > > Signed-off-by: Tao Tang > --- > hw/arm/smmuv3.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c > index b5dc67dcb01..3ff2f498a3b 100644 > --- a/hw/arm/smmuv3.c > +++ b/hw/arm/smmuv3.c > @@ -597,7 +597,7 @@ static void decode_ste_config(SMMUTransCfg *cfg, uint32_t config) > > /* Returns < 0 in case of invalid STE, 0 otherwise */ > static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg, > - STE *ste, SMMUEventInfo *event) > + STE *ste, SMMUEventInfo *event, SMMUSecSID sec_sid) > { > uint32_t config; > /* OAS field only presents on NS-IDR5 so we use hardcoded SMMU_SEC_SID_NS */ > @@ -651,6 +651,14 @@ static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg, > if (ret) { > goto bad_ste; > } > + > + /* > + * It is ILLEGAL to set STE.Config == 0b11x according to (IHI 0070G.b) > + * 5.2 STE, Stream Table Entry, Page 218. > + */ This is not the latest spec, and there is no need to mention the page. It might be more clear to mention that Qemu doesn’t support secure stage-2 rather than say it is ILLEGAL. Thanks, Mostafa > + if (sec_sid == SMMU_SEC_SID_S) { > + goto bad_ste; > + } > } > > /* Multiple context descriptors require SubstreamID support */ > @@ -916,7 +924,7 @@ static int smmuv3_decode_config(IOMMUMemoryRegion *mr, SMMUTransCfg *cfg, > return ret; > } > > - ret = decode_ste(s, cfg, &ste, event); > + ret = decode_ste(s, cfg, &ste, event, sec_sid); > if (ret) { > return ret; > } > -- > 2.34.1 >