Re: [PATCH v3 2/5] drm/xe/vram: report FLAT_CCS base misalignment

[Matthew Brost <matthew.brost@intel.com>]

On Wed, Sep 02, 2026 at 01:41:20PM +0100, Matthew Auld wrote:
> So we can easily check if a machine had the CCS bug, when looking back
> over bug reports where we have the same machine with newer kernel.
> 
> Example print for a machine with the CCS bug:
> 
>   FLAT_CCS base:27bbff800, aligned:no
> 
> v2 (Matt B):
>   - Unconditionally print the base + alignment
> 
> Fixes: 37173392741c ("drm/xe/vram: fix ccs offset calculation")
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: stable@kernel.org
> ---
>  drivers/gpu/drm/xe/xe_vram.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
> index 7b4478fb1697..56cff1e44530 100644
> --- a/drivers/gpu/drm/xe/xe_vram.c
> +++ b/drivers/gpu/drm/xe/xe_vram.c
> @@ -90,6 +90,9 @@ static int get_flat_ccs_offset(struct xe_gt *gt, u64 tile_size, u64 *poffset)
>  		offset |= offset_lo << 6; /* HW view bits 31:6 */
>  		offset *= num_enabled; /* convert to SW view */
>  
> +		drm_info(&xe->drm, "FLAT_CCS base:%llx, aligned:%s\n", offset,
> +			 str_yes_no(IS_ALIGNED(offset, SZ_128K)));
> +
>  		/*
>  		 * Everything below this offset is handed to the VRAM
>  		 * allocator, so it has to be the *first* address the
> -- 
> 2.55.0
>