Re: [PATCH v2 1/3] x86/viridian: Workaround Hyper-V GP fault writing to MSR

["Roger Pau Monné" <roger@xenproject.org>]

On Fri, Sep 04, 2026 at 03:15:14PM +0100, Ross Lagerwall wrote:
> The Viridian spec requires the vector to be >= 0x10 when writing to the
> SINTx MSR, otherwise it should #GP fault.
> The spec-defined initial value is 0x0000000000010000, i.e. the vector is
> 0. On startup, for some reason Windows 11 Hyper-V tries to set the MSR to
> the spec-defined initial value and since the vector is 0, it GP faults.
> To workaround this, treat the write as a no-op if the value is
> unchanged.
> 
> Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
> Acked-by: Jan Beulich <jbeulich@suse.com>
> ---
> 
> In v2: Added a comment to clarify
> 
>  xen/arch/x86/hvm/viridian/synic.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/xen/arch/x86/hvm/viridian/synic.c b/xen/arch/x86/hvm/viridian/synic.c
> index e6cba7548f1b..75b004440e58 100644
> --- a/xen/arch/x86/hvm/viridian/synic.c
> +++ b/xen/arch/x86/hvm/viridian/synic.c
> @@ -157,6 +157,14 @@ int viridian_synic_wrmsr(struct vcpu *v, uint32_t idx, uint64_t val)
>          if ( !(viridian_feature_mask(d) & HVMPV_synic) )
>              return X86EMUL_EXCEPTION;
>  
> +        /*
> +         * Windows 11 Hyper-V (26H1) has been seen to write this MSR to
> +         * its default value, despite not being a spec compliant value.
> +         * Tolerate writes which have no change in value.
> +         */
> +        if ( val == vs->as_uint64 )
> +            break;

To make this a bit less workaround like, could we ignore the vector if
the SINT is masked (bit 16 set)?

Thanks, Roger.