From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Karthik Poosa <karthik.poosa@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <anshuman.gupta@intel.com>,
<badal.nilawar@intel.com>, <raag.jadav@intel.com>,
<riana.tauro@intel.com>, <sk.anirban@intel.com>,
<mallesh.koujalagi@intel.com>, <soham.purkait@intel.com>,
<ravi.kishore.koppuravuri@intel.com>
Subject: Re: [PATCH v2 1/2] drm/xe/pcode: Increase default pcode mailbox timeout to 10ms
Date: Thu, 10 Sep 2026 17:59:03 -0400 [thread overview]
Message-ID: <aqMoJ4bePB4G8zJG@intel.com> (raw)
In-Reply-To: <20260907083520.192418-2-karthik.poosa@intel.com>
On Mon, Sep 07, 2026 at 02:05:19PM +0530, Karthik Poosa wrote:> The previous 1ms timeout may be insufficient for some mailbox commands,
> leading to spurious -ETIMEDOUT failures under load. Increase the default
> timeout to 10ms and introduce PCODE_DEFAULT_TIMEOUT_MS for a shared
> timeout definition, in line with pcode mailbox specification guidance.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_pcode.c | 2 +-
> drivers/gpu/drm/xe/xe_pcode.h | 4 +++-
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c
> index d502205bb72a..266deecbb100 100644
> --- a/drivers/gpu/drm/xe/xe_pcode.c
> +++ b/drivers/gpu/drm/xe/xe_pcode.c
> @@ -140,7 +140,7 @@ int xe_pcode_read(struct xe_tile *tile, u32 mbox, u32 *val0, u32 *val1)
> int err;
>
> mutex_lock(&tile->pcode.lock);
> - err = pcode_mailbox_rw(tile, mbox, val0, val1, 1, true, false);
> + err = pcode_mailbox_rw(tile, mbox, val0, val1, PCODE_DEFAULT_TIMEOUT_MS, true, false);
> mutex_unlock(&tile->pcode.lock);
>
> return err;
> diff --git a/drivers/gpu/drm/xe/xe_pcode.h b/drivers/gpu/drm/xe/xe_pcode.h
> index ba8a1d1b2152..7e43792b0037 100644
> --- a/drivers/gpu/drm/xe/xe_pcode.h
> +++ b/drivers/gpu/drm/xe/xe_pcode.h
> @@ -18,6 +18,8 @@ struct xe_pcode_version {
> u32 engg;
> };
>
> +#define PCODE_DEFAULT_TIMEOUT_MS 10
> +
> int xe_pcode_init_early(struct xe_tile *tile);
> int xe_pcode_probe_early(struct xe_device *xe);
> int xe_pcode_ready(struct xe_device *xe, bool locked);
> @@ -31,7 +33,7 @@ int xe_pcode_write64_timeout(struct xe_tile *tile, u32 mbox, u32 data0,
> int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version);
>
> #define xe_pcode_write(tile, mbox, val) \
> - xe_pcode_write_timeout(tile, mbox, val, 1)
> + xe_pcode_write_timeout(tile, mbox, val, PCODE_DEFAULT_TIMEOUT_MS)
>
> int xe_pcode_request(struct xe_tile *tile, u32 mbox, u32 request,
> u32 reply_mask, u32 reply, int timeout_ms);
> --
> 2.25.1
>
next prev parent reply other threads:[~2026-09-10 21:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-07 8:35 [PATCH v2 0/2] drm/xe/pcode: Increase default mailbox timeout Karthik Poosa
2026-09-07 8:35 ` [PATCH v2 1/2] drm/xe/pcode: Increase default pcode mailbox timeout to 10ms Karthik Poosa
2026-09-10 21:59 ` Rodrigo Vivi [this message]
2026-09-07 8:35 ` [PATCH v2 2/2] drm/xe/hwmon: Use shared pcode default timeout for power limit write Karthik Poosa
2026-09-07 8:44 ` sashiko-bot
2026-09-08 6:06 ` Poosa, Karthik
2026-09-10 21:59 ` Rodrigo Vivi
2026-09-07 8:44 ` ✓ CI.KUnit: success for drm/xe/pcode: Increase default mailbox timeout Patchwork
2026-09-07 9:34 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-07 10:59 ` ✗ Xe.CI.FULL: failure " Patchwork
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