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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?Z1cbsNmovjp0nvaDYFY4HoY/aTzEbnZa9wf0sCC5CYeahjfnXsmvedsD6Y7V?= =?us-ascii?Q?ENfoVqu1NMmpszRIgVTQ6hm9qYaVGlMf+9WzlG8GOxvP+x8PW2WW5CySrNhh?= =?us-ascii?Q?EOKh44kdTkeVcOAUDeAqvZTTEMO0uoI1CG6KgqQFLYgo5lK6BWAryRNSGGc9?= =?us-ascii?Q?b0MwdokqOwE/2RWg+sakSWzit59cZPozUvA53U4DQlBHzeeBZ6ROc/dY5kpa?= =?us-ascii?Q?rJTJuRBLsIe3pQ8de1ZM43VS3MW4iEiHgWpUHB4qIhneoYLkLIpceoZTdxFN?= =?us-ascii?Q?sgsM1gUfIhQqOH81Q5WDNUpcM1DiKNt12Yr5MTtLE3wGFoLeCZK9w65Gi/XG?= =?us-ascii?Q?SBMscbURz3xZdr1p5wkGMorka6/0dlrMRaWEYp/mDu5yo51wo8pJaleG0PIB?= =?us-ascii?Q?IEOt7m6TbkP7ZQl3M7fTa8WPIfbKDshW3mz9L8nM2G++yWiAn3/HdzOa1FU6?= =?us-ascii?Q?uDt84cDsjnNNGcRqvlhCy19Ir2LnlUdZc17uhL7SkKd7Bljg68ff4yKNUSgB?= =?us-ascii?Q?ueZsPxRYgVZ3uOKf8q5nuVmkAZMLy1AqGFumMsWQe/HGXQ2JCYoKii3Cui69?= =?us-ascii?Q?TSOeV6ZU0XRZgi3PabdKuutwRo7EHptY8ToKnGerNGx8Jk+2KZkueEB+pR7U?= =?us-ascii?Q?6EM0NMElw1QE/1+Te3w3xGlwAZPPdHxjIqfq/08WrkAhyKAOYHtIFfQrxVIJ?= =?us-ascii?Q?WaPbLGHptZ/l8zAjIU31aFcZL5eGsIbHWF99L7tgcfqKTn9LrFGZQvaNrGN3?= =?us-ascii?Q?kan+bt6gZMWhOu99wJtvlH7Crqw2ZzX2Y4lsb9niTmISxxVrVLUtaS/O9uEz?= =?us-ascii?Q?C8KTT5y8kzl4zd4UkkZnCE70Z2nCy1SfSWrKRFSJg9XCdQA6AAMDxutwBXMt?= =?us-ascii?Q?AgAmS7y1blrxwJ725xykvTQBllEDUry2qdVh5M4xzjG1noG01cKk2mK2EaWR?= =?us-ascii?Q?ToGD0C3gLL8CNAYTWKbNLxWqiZOQ/kLkcvnpcHk8u8/8VH7itJ1+JaAbXqpk?= =?us-ascii?Q?b/+F16abG58yMFhpzqODEmK1x7uUCMpc/ERTW01OiIES4AhOJZer9ohWaZ48?= =?us-ascii?Q?EojSMS+cQ/E+q+9P0NYvf5C61rsvNR5ZXIphmd1lDaYwHb4NTSE0GLEkxSy0?= =?us-ascii?Q?rQhZwhsjxLb+J92EXU2XRVNudou0ArWp3RHfYloMcridNdDscKZ7Xp3X3wXW?= =?us-ascii?Q?r/5IHjle8Pel5k3Vg+/+YX5BdOCPAbtvWhjg6XSKue5oRE2tX2WUHdo3lOgb?= =?us-ascii?Q?nAen5wGZyhoASke+jLmm0gtRbBxl6+iosLEWLG16EJbubQSLqwqnFQsJ1fLQ?= =?us-ascii?Q?9ZXkP8l2eBPw9P7aYg9nZt2uBl01DL0BTznV7/k6XPfk9GphTWRVGD41DHka?= =?us-ascii?Q?XzkA33wFY1kDJR/7Oujb9+9y+2lHLFF99/RbKmoDoRws0VXc6cn/9PYf5FuC?= =?us-ascii?Q?JXe59DsU2vrt6GH+cxsNBkZZV6GphPvzK6eriXS0RR8zOwNumKMPCzrFBfZ6?= =?us-ascii?Q?IsULVNDH0eikJu1XXW11VsFGq2W+BsGyLNW0GbhBToCzVvE2mI+89lMSU7x6?= =?us-ascii?Q?8LKVSP5p/1eXlZ35UK66CflQv5HpYbOtasYoSCybEkTMx4hF+l+g8v7zFItD?= =?us-ascii?Q?x/rxwbVE5HLJZeJKW1oZj5kiAVsE3JuQ6n41N8me8vB9q/MpGzRKWgGiAX5K?= =?us-ascii?Q?9bJBKjPmHGbDDGBPz6i0qcr3+q/7bl17g8nRapNHKXd6XasY?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0b252d8a-b412-4df8-2377-08df12f7a067 X-MS-Exchange-CrossTenant-AuthSource: BL0PR12MB2370.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2026 07:04:46.8816 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AbhlEyKKn1IQnF6Rz5Mtl77Gm0p3WxethVXetHabD5cWArPnQSPcVCYjqd0zVsUP+55HAMfEjmb0ehMcCy3C/w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4323 On Tue, Sep 08, 2026 at 03:15:05AM +0800, Anisa Su wrote: > From: Ira Weiny > > Per the CXL 4.0 specification software must check the Command Effects > Log (CEL) for dynamic capacity command support. > > Detect support for the DCD commands while reading the CEL, including: > > Get DC Config > Get DC Extent List > Add DC Response > Release DC > > Leave mds->dcd_supported false. Dynamic capacity is only usable once > the driver can handle Add and Release Capacity events. Detect and log > the capability here and let the commit which adds DCD event handling set > the flag. > > Based on an original patch by Navneet Singh. > > Signed-off-by: Ira Weiny > Signed-off-by: Anisa Su > Tested-by: Wonjae Lee > Tested-by: Junhee Park > Tested-by: Heesoo Kim > Reviewed-by: Dave Jiang > Reviewed-by: Gregory Price (Meta) > Reviewed-by: Richard Cheng Just a small nit below. > --- > Changes: > 1. Commit message: explain why mds->dcd_supported is left > false and when it's re-enabled in the commit message. > > 2. mbox.c: drop the single use cxl_verify_dcd_cmds() helper and test > bitmap_full(dcd_cmds, CXL_DCD_ENABLED_MAX) directly. Reported by > Alison Schofield. > --- > drivers/cxl/core/mbox.c | 39 +++++++++++++++++++++++++++++++++++++++ > drivers/cxl/cxlmem.h | 20 ++++++++++++++++++++ > 2 files changed, 59 insertions(+) > > diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c > index 55828a836c01..199bb986d674 100644 > --- a/drivers/cxl/core/mbox.c > +++ b/drivers/cxl/core/mbox.c > @@ -171,6 +171,33 @@ static void cxl_set_security_cmd_enabled(struct cxl_security_state *security, > } > } > > +static bool cxl_is_dcd_command(u16 opcode) > +{ > +#define CXL_MBOX_OP_DCD_CMDS 0x48 > + > + return (opcode >> 8) == CXL_MBOX_OP_DCD_CMDS; > +} why not (opcode & 0xff00) == CXL_MBOX_OP_DCD_CMDS and #define CXL_MBOX_OP_DCD_CMDS 0x4800 so we don't have to shift bits Best regards, Richard Cheng. > + > +static void cxl_set_dcd_cmd_enabled(u16 opcode, unsigned long *cmd_mask) > +{ > + switch (opcode) { > + case CXL_MBOX_OP_GET_DC_CONFIG: > + set_bit(CXL_DCD_ENABLED_GET_CONFIG, cmd_mask); > + break; > + case CXL_MBOX_OP_GET_DC_EXTENT_LIST: > + set_bit(CXL_DCD_ENABLED_GET_EXTENT_LIST, cmd_mask); > + break; > + case CXL_MBOX_OP_ADD_DC_RESPONSE: > + set_bit(CXL_DCD_ENABLED_ADD_RESPONSE, cmd_mask); > + break; > + case CXL_MBOX_OP_RELEASE_DC: > + set_bit(CXL_DCD_ENABLED_RELEASE, cmd_mask); > + break; > + default: > + break; > + } > +} > + > static bool cxl_is_poison_command(u16 opcode) > { > #define CXL_MBOX_OP_POISON_CMDS 0x43 > @@ -759,6 +786,7 @@ static void cxl_walk_cel(struct cxl_memdev_state *mds, size_t size, u8 *cel) > struct cxl_mailbox *cxl_mbox = &mds->cxlds.cxl_mbox; > struct cxl_cel_entry *cel_entry; > const int cel_entries = size / sizeof(*cel_entry); > + DECLARE_BITMAP(dcd_cmds, CXL_DCD_ENABLED_MAX) = {}; > struct device *dev = mds->cxlds.dev; > int i, ro_cmds = 0, wr_cmds = 0; > > @@ -787,11 +815,22 @@ static void cxl_walk_cel(struct cxl_memdev_state *mds, size_t size, u8 *cel) > enabled++; > } > > + if (cxl_is_dcd_command(opcode)) { > + cxl_set_dcd_cmd_enabled(opcode, dcd_cmds); > + enabled++; > + } > + > dev_dbg(dev, "Opcode 0x%04x %s\n", opcode, > enabled ? "enabled" : "unsupported by driver"); > } > > set_features_cap(cxl_mbox, ro_cmds, wr_cmds); > + /* > + * Disabled until event handling implemented. > + */ > + if (bitmap_full(dcd_cmds, CXL_DCD_ENABLED_MAX)) > + dev_dbg(dev, "Device supports DCD; capability disabled\n"); > + mds->dcd_supported = false; > } > > static struct cxl_mbox_get_supported_logs *cxl_get_gsl(struct cxl_memdev_state *mds) > diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h > index c401e3a1af06..0c8e23276dc6 100644 > --- a/drivers/cxl/cxlmem.h > +++ b/drivers/cxl/cxlmem.h > @@ -252,6 +252,20 @@ struct cxl_event_state { > struct mutex log_lock; > }; > > +/* > + * CXL r4.0 Section 8.2.10.9 - Memory Device Command Sets. See Table 8-308. > + * > + * The 48h Command Set (Opcodes 4800h - 4803h) defines the device-enabled DCD > + * commands. > + */ > +enum dcd_cmd_enabled_bits { > + CXL_DCD_ENABLED_GET_CONFIG, > + CXL_DCD_ENABLED_GET_EXTENT_LIST, > + CXL_DCD_ENABLED_ADD_RESPONSE, > + CXL_DCD_ENABLED_RELEASE, > + CXL_DCD_ENABLED_MAX > +}; > + > /* Device enabled poison commands */ > enum poison_cmd_enabled_bits { > CXL_POISON_ENABLED_LIST, > @@ -427,6 +441,7 @@ static inline struct cxl_dev_state *mbox_to_cxlds(struct cxl_mailbox *cxl_mbox) > * @partition_align_bytes: alignment size for partition-able capacity > * @active_volatile_bytes: sum of hard + soft volatile > * @active_persistent_bytes: sum of hard + soft persistent > + * @dcd_supported: all DCD commands are supported > * @event: event log driver state > * @poison: poison driver state info > * @security: security driver state info > @@ -445,6 +460,7 @@ struct cxl_memdev_state { > u64 partition_align_bytes; > u64 active_volatile_bytes; > u64 active_persistent_bytes; > + bool dcd_supported; > > struct cxl_event_state event; > struct cxl_poison_state poison; > @@ -505,6 +521,10 @@ enum cxl_opcode { > CXL_MBOX_OP_UNLOCK = 0x4503, > CXL_MBOX_OP_FREEZE_SECURITY = 0x4504, > CXL_MBOX_OP_PASSPHRASE_SECURE_ERASE = 0x4505, > + CXL_MBOX_OP_GET_DC_CONFIG = 0x4800, > + CXL_MBOX_OP_GET_DC_EXTENT_LIST = 0x4801, > + CXL_MBOX_OP_ADD_DC_RESPONSE = 0x4802, > + CXL_MBOX_OP_RELEASE_DC = 0x4803, > CXL_MBOX_OP_MAX = 0x10000 > }; > > -- > 2.43.0 >