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From: "Lorenzo Stoakes (ARM)" <ljs@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	 Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Joey Gouly <joey.gouly@arm.com>,
	 Suzuki K Poulose <suzuki.poulose@arm.com>,
	Shuah Khan <shuah@kernel.org>, Oliver Upton <oupton@kernel.org>,
	 Fuad Tabba <fuad.tabba@linux.dev>,
	Peter Maydell <peter.maydell@linaro.org>,
	 Leonardo Bras <leo.bras@arm.com>,
	Wei-Lin Chang <weilin.chang@arm.com>,
	 Yao Yuan <yaoyuan@linux.alibaba.com>,
	linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	 kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v21 06/15] KVM: arm64: Validate GCS exception lock when emulating ERET
Date: Thu, 1 Oct 2026 14:10:53 +0100	[thread overview]
Message-ID: <ar5GKCNx4XOpRnHl@gremlin> (raw)
In-Reply-To: <20260930-arm64-gcs-v21-6-3556644cd927@kernel.org>

On Wed, Sep 30, 2026 at 10:48:16PM +0100, Mark Brown wrote:
> As per DDI0487 R_TYTWB GCS adds an additional case where an illegal
> exception return can be generated. If all of:
>
>  - PSTATE.EXLOCK is 0.
>  - The EL is not being changed by the ERET.
>  - GCSCR_ELx.EXLOCKEN is 1.

Ack can see from [0] in D.1.4.4.2 (M.d):

"If the Effective value of GCSCR_ELx.EXLOCKEN is 1 and PSTATE.EXLOCK is 0, the
execution of an exception return instruction to return to the current Exception
level ELx."

[0]: https://support.arm.com/documentation/ddi0487/md/-Part-D-The-AArch64-System-Level-Architecture/-Chapter-D1-The-AArch64-System-Level-Programmers--Model/-D1-4-Exceptions/-D1-4-4-Exception-return?lang=en

>
> are true then the return is illegal. Emulate this behaviour when
> emulating ERET for nested guests, while we're at it using the symbolic
> definition for EXLOCK in SPSR.
>
> Reviewed-by: Leonardo Bras <leo.bras@arm.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>

Some comments below. In general LGTM so:

Reviewed-by: Lorenzo Stoakes (ARM) <ljs@kernel.org>

> diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h
> index 1ed708335809..9e595e8e7642 100644
> --- a/arch/arm64/include/asm/kvm_nested.h
> +++ b/arch/arm64/include/asm/kvm_nested.h

> +#ifdef CONFIG_ARM64_GCS
> +/* See IllegalExceptionReturn() pseudocode */

Ack I see that at [1].

[1]: https://support.arm.com/documentation/ddi0487/md/-Part-J-Architectural-Pseudocode/-Chapter-J1-A-profile-Architecture-Pseudocode/-J1-4-Shared-pseudocode/-J1-4-647-IllegalExceptionReturn?lang=en

> +static inline bool kvm_check_illegal_exlock_return(struct kvm_vcpu *vcpu,
> +						   u64 spsr)
> +{
> +	u64 pstate, cur_mode, target_mode;
> +
> +	if (!kvm_has_gcs(vcpu->kvm))
> +		return false;
> +
> +	if (vcpu->arch.ctxt.regs.pstate & PSR_EXLOCK_BIT)
> +		return false;
> +
> +	/* Check the EL only, ignore thread mode */
> +	pstate = vcpu->arch.ctxt.regs.pstate;
> +	cur_mode = (pstate & PSR_MODE_MASK) | PSR_MODE_THREAD_BIT;
> +	target_mode = (spsr & PSR_MODE_MASK) | PSR_MODE_THREAD_BIT;
> +
> +	if (cur_mode != target_mode)
> +		return false;
> +
> +	return vcpu_read_sys_reg(vcpu, GCSCR_EL2) & GCSCR_ELx_EXLOCKEN;

This seems identical, logically, to the psuedocode:

    if (IsFeatureImplemented(FEAT_GCS) && PSTATE.EXLOCK == ‘0’ &&
          PSTATE.EL == target && GetCurrentEXLOCKEN()) then
        return TRUE;
    end;
    return FALSE;

So LGTM.

> diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c
> index 625604019fb3..5aa26384720a 100644
> --- a/arch/arm64/kvm/emulate-nested.c
> +++ b/arch/arm64/kvm/emulate-nested.c
> @@ -2748,10 +2748,13 @@ static u64 kvm_check_illegal_exception_return(struct kvm_vcpu *vcpu, u64 spsr)
>  	 * - trying to return to an illegal M value
>  	 * - trying to return to a 32bit EL
>  	 * - trying to return to EL1 with HCR_EL2.TGE set
> +	 * - GCSCR_ELx.EXLOCKEN is 1 and PSTATE.EXLOCK is 0 when attempting
> +	 *   to return from ELx the same EL.

This seems a little unclear, 'when attempting to return to the same EL'
perhaps?

> @@ -2778,7 +2781,7 @@ static u64 kvm_check_illegal_exception_return(struct kvm_vcpu *vcpu, u64 spsr)
>
>  		mask = PSR_MODE_MASK | PSR_MODE32_BIT;
>  		if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, GCS, IMP))

Could use kvm_has_gcs()?

> -			mask |= BIT_ULL(34);	/* PSTATE.EXLOCK */
> +			mask |= PSR_EXLOCK_BIT;

Ah nice to not hard code that any more!

> diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
> index 7875911c0506..af59d1bf51ad 100644
> --- a/arch/arm64/kvm/hyp/vhe/switch.c
> +++ b/arch/arm64/kvm/hyp/vhe/switch.c
> @@ -383,6 +383,10 @@ static bool kvm_hyp_handle_eret(struct kvm_vcpu *vcpu, u64 *exit_code)
>  		return false;
>  	}
>
> +	/* Push GCS exception lock failures into the slow path */
> +	if (kvm_check_illegal_exlock_return(vcpu, spsr))
> +		return false;
> +

Ah yeah because false -> slow path and illegal exceptions shouldn't be fast path
:)

--
Cheers, Lorenzo

  reply	other threads:[~2026-10-01 13:11 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-30 21:48 [PATCH v21 00/15] KVM: arm64: Provide guest support for GCS Mark Brown
2026-09-30 21:48 ` [PATCH v21 01/15] arm64/gcs: Ensure FGTs for EL1 GCS instructions are disabled Mark Brown
2026-09-30 21:48 ` [PATCH v21 02/15] KVM: arm64: Refuse to start a guest with S1PIE or S1POE but not TCR2 Mark Brown
2026-09-30 22:05   ` sashiko-bot
2026-10-01 11:25     ` Lorenzo Stoakes (ARM)
2026-10-01 12:07       ` Mark Brown
2026-10-01 10:50   ` Lorenzo Stoakes (ARM)
2026-10-03 12:30   ` Marc Zyngier
2026-09-30 21:48 ` [PATCH v21 03/15] KVM: arm64: Manage GCS access and registers for guests Mark Brown
2026-10-01 11:28   ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 04/15] KVM: arm64: Ensure GCS memory effects are visible Mark Brown
2026-09-30 21:48 ` [PATCH v21 05/15] KVM: arm64: Set PSTATE.EXLOCK when entering an exception Mark Brown
2026-10-01 11:37   ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 06/15] KVM: arm64: Validate GCS exception lock when emulating ERET Mark Brown
2026-10-01 13:10   ` Lorenzo Stoakes (ARM) [this message]
2026-09-30 21:48 ` [PATCH v21 07/15] KVM: arm64: Forward GCS exceptions to nested guests Mark Brown
2026-10-01 14:25   ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 08/15] KVM: arm64: Enforce EXLOCK for SPSR and ELR Mark Brown
2026-10-01 16:26   ` Lorenzo Stoakes (ARM)
2026-10-01 21:11     ` Mark Brown
2026-10-02 11:50       ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 09/15] KVM: arm64: Allow GCS to be enabled for guests Mark Brown
2026-10-01 16:29   ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 10/15] KVM: selftests: arm64: Check that invalid feature combinations are rejected Mark Brown
2026-10-01 16:35   ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 11/15] KVM: selftests: arm64: Add GCS registers to get-reg-list Mark Brown
2026-10-01 16:36   ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 12/15] KVM: selftests: arm64: Add GCS to set_id_regs Mark Brown
2026-10-01 16:38   ` Lorenzo Stoakes (ARM)
2026-10-01 18:14     ` Mark Brown
2026-10-02 11:27       ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 13/15] KVM: selftests: arm64: Only restore SPSR_EL1 and ELR_EL1 if they change Mark Brown
2026-10-01 16:41   ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 14/15] tools: Synchronise the kernel esr.h Mark Brown
2026-09-30 22:14   ` sashiko-bot
2026-10-01 16:47   ` Lorenzo Stoakes (ARM)
2026-10-01 17:27     ` Mark Brown
2026-10-02 11:31       ` Lorenzo Stoakes (ARM)
2026-09-30 21:48 ` [PATCH v21 15/15] KVM: selftests: arm64: Add GCS EXLOCK exception emulation test Mark Brown
2026-09-30 22:24   ` sashiko-bot
2026-10-01 16:53   ` Lorenzo Stoakes (ARM)

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